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Controlling Noise and Radiation in Mixed-Signal and Digital Systems
Nicholas Gray
Slide 1
Good day, everyone. Welcome to this Web-based presentation. My name is Nicholas Gray, otherwise known as “Nick” Gray. Today we hope to help you understand some of the issues regarding noise and radiation in mixed-signal and digital systems, but this short seminar cannot be all-inclusive. The principles discussed here, combined with the engineering knowledge you already possess, will help you to produce designs with layouts that exhibit less noise and produce less radiation than many methods in current use. We will entertain questions at the end, so ask them as they come up. Those questions that are appropriate we will answer during the presentation. If we don’t have time to answer all the questions today, I will e-mail answers later this week.
Slide 2
Today’s agenda will include some background information that will help you understand the principles upon which our recommendations are based. This discussion will include the principles relative to A to Ds (analog-to-digital converters), but they apply just as well to all mixed-signal circuitry and to high-speed digital circuitry. For your convenience, this presentation will be available for download from the Website and contain a Glossary of Terms at the very end.
Slide 3
High digital edge rates correspond to high frequencies, and as digital rates increase and edges slew faster, it is becoming necessary to use high frequency, that is to say, analog techniques in the design of printed circuit boards. All lines carrying signals, digital or analog, are transmission lines, not just simple traces. We can often consider these lines to be simple traces and get away with it, but that can often be a dangerous consideration as far as the integrity of the signal is concerned. Transmission lines, of course, need to be properly terminated to avoid signal reflections that can cause both distortion and radiation. The distortion, of course, can lead to a change of timing and jitter. The jitter, in turn, results in noise in the conversion results when you’re using an A to D converter.
Slide 4
Signals propagate down a line. An improperly terminated signal line may distort that signal to the point that it does not go through an input threshold rapidly enough, resulting in uncertainty in the effective edge timing and in the interpretation as to whether it is a logic high or a logic low. For clock signals, this can result in mis-clocking. For an ADC clock, the result can be as mild as a noisy conversion result, or as serious as a complete malfunction.
Slide 5
Sometimes we can get away with treating a signal line as a simple trace. When must a trace be considered a transmission line? The formula here tells us that the line length beyond which a trace must be treated as a transmission line is a function of the digital signal rise time and the propagation rate across the board, but it is best to always treat the line as a transmission line. For analog signals, it is common to use one-fourth of the period of the highest frequency component in the signal in place of the rise time.
Slide 6
Here we consider an ADC clock with a 2-nanosecond rise time on a board of common FR-4 material. Answering this question is a simple matter of plugging the numbers into the equation on the previous page. The answer brings home the fact that a very short line can be a transmission line. Imagine the problem of very high frequency signals with sub-nanosecond rise times.
Slide 7
There are two types of termination techniques. Series termination requires that a resistor be added in series with the line close to the signal source. The sum of the source resistance plus the added series resistor should equal the characteristic impedance of the line. This usually satisfies the termination requirements. When series termination does not do the job, AC termination may be called for. The reason that series termination may not do the job usually results from using a single source to drive many loads, improper termination resistor value, and/or a non-constant impedance of the line. Causes of a non-constant line impedance include the use of feedthroughs on the line or having other nearby lines with a non-constant distance from the line under question.
Slide 8
The driver output impedance plus the external series resistance should be equal to the characteristic impedance of the transmission line. The distance from the source to this resistor is limited by the same equation limiting the length of a simple trace. That equation is repeated here. Implied here is the fact that the impedance of the line must be equal at all points. The further implication is that stripline or microstrip control techniques should be used. See National Semiconductor Application Note AN-1113 for more information.
Slide 9
AC termination consists of a series RC from the line to ground located near the destination pin, but beyond it, as seen from the signal source. The resistor value should be equal to the characteristic impedance of the line and the capacitor value is as indicated here. The unit of t sub PR (tPR) and L should be consistent with each other.
Slide 10
Let’s look at an example of a capacitor value for AC termination. The resistor value for AC termination should equal the characteristic impedance of the line, or 50 Ohms in this case. The minimum capacitor value is easily calculated to be 84 picofarads. A capacitor of 110 picofarads, 20 percent, should do the job well.
Slide 11
We know that current seeks the path of least resistance, or at least so we have been told. The truth is that current seeks the path of least impedance. At DC, resistance and impedance are the same, but circuit impedance can be quite a bit higher than circuit resistance at high frequencies. To make matters worse, AC resistance is higher than is DC resistance. Since we are so accustomed to dealing with frequencies in the tens of megahertz, we tend to regard high frequencies as something higher than this: perhaps a few hundred megahertz or a gigahertz. The fact remains, however, that high frequencies, as far as circuit impedances are concerned, are those frequencies beyond just a few megahertz. DC current flow fills the entire volume of a conductor, but AC current flow is restricted to the surface of a conductor because of the inductance of that conductor. This results in a lower effective conductor cross sectional area and increased AC resistance.
Slide 12
This so-called Skin Effect is caused by the fact that the inductance in the center of the conductor is higher than it is on the surface. This results directly from the fact that the magnetic force radiates from the center of a conductor. The first line of force cuts through the entire conductor, but the last line barely starts out from the center of the conductor before it collapses; it never gets to the surface of the conductor. So, the surface of the conductor has fewer lines of force cutting it and less inductance than does the center of the conductor. The result is that current flows almost exclusively on the surface of a conductor, resulting in cross-sectional area of the conductor -- I’m sorry, reducing the effective cross-sectional area of the conductor, and increasing its AC resistance. The conductor may as well be hollow as far as AC current flow is concerned.
The average depth of current penetration, that is, the skin depth, is very shallow. The distribution of currents in a conductor experiencing the skin effect falls off exponentially as we approach the center of the conductor. The skin depth is as outlined here, where mr (mu sub R) is the magnetic permeability of the conductor relative to copper (so, it would be 1 if the material is copper) -- ? is the resistivity of the conductor and ?cu (rho sub cu) is the resistivity of copper. For copper, therefore, ? / ? cu = 1 and k becomes unity. The next slide shows a plot of skin depth as a percent of wire radius for 22-gauge wire.
Slide 13
The Skin Effect begins to take effect at about 42 KHz for 22-gauge wire and Skin Depth falls off rather drastically as frequency increases. These plots show skin depth as a percentage of conductor radius. The lower plot goes from DC to 1 GHz; the upper plot shows detail only to 300 KHz.
Slide 14
The formula here is for a flat conductor of width “w” and thickness “h”. That is, what you might find on a printed circuit board. The rapid roll-off of skin depth with frequency tells us that the AC resistance increases rapidly at high frequencies. The AC resistance of a conductor at high frequencies, then, is much higher than is its DC resistance. The graph on the next slide illustrates this.
Slide 15
As we see here, the skin effect really does have a big impact upon current flow. This is for a typical one-ounce copper trace of 6 mils width.
Slide 16
Let’s take a look at AC resistance of a typical copper trace on a printed circuit board at 80 MHz. Since the trace is a copper one, ?r is unity. Substituting the frequency and trace dimensions in the equation reveals a resistance that is a real eye-opener: 0.155 Ohms per inch. So, you’re not going to go very far before you have a significant resistance. This is resistance now, not impedance, AC resistance.
Slide 17
As conductors come closer together, and/or as frequency increases, the current flowing through two adjacent conductors try to come closer to each other. DC-return currents will fill the entire conductor, where AC currents do not. The path of least impedance is the path where the magnetic fields around the outgoing and return currents are intimately bound together, causing these currents to flow very close together. This causes the ground plane currents to be pretty much confined to a path directly below the corresponding outgoing currents on a PC board. This is as though the ground plane was really a return trace immediately below the outgoing trace.
Question:
Someone has asked, “What are the units for skin depth?”
The units for skin depth, as we see -- let me see which slide that was. We can go back to it. Hold on, please. I’m trying to find the slide where we had that. Okay, back at slide 12. We’re talking about the units of skin depth that we have here. We have 2.6 x k; k is unity for copper over the square root of frequency. This is going to -- let me think. Let me recall what I had for -- how did I derive that 2.6? This is either inches or mils. I believe it’s mils, but I will have to confirm that. I have to go back and look at my material. Okay, so let’s continue.
Slide 18
The return current in the ground plane follows the outgoing current in the trace above or below it, and follows rather closely. The current at distance “D” from the edge of the trace falls to less than 4 percent of the current below the trace when the D/H ratio is 5, and to less than 1 percent of the current below the trace when the D to H ratio is 10. The result is a current density in the ground plane that is fairly well confined to the area below the current’s corresponding outgoing current path. The current density formula will tell us that the current density at any point in the plane, relative to the edge of the outgoing trace, or dimension “D”. Note that this formula gives us current density, not current. Typical “H” dimension will depend upon which layers the trace and plane are located. Between an outside layer and an inside layer, “H” is typically about 75 mils for 4 and 6-layer boards. Between inside layers, “H” is typically about 39 mils for 4-layer board or 14 mils for a 6-layer board.
Slide 19
Here we can see how 40 MHz noise in a ground plane can be significant. Note that, assuming 0.55 Ohms of ground path resistance, a three-inch trace can produce enough ground noise to seriously affect high resolution ADCs. There is not much effect at 8 bits, but we can begin to see the effect at 10 bits. The noise can be prohibitive at 14 bits and higher. You have to wonder if it is even possible to realize the full noise potential of a high speed, high resolution ADC.
Question:
We have a question, “How do we determine the characteristic impedance of a trace?" And there's a specific example. I will refer you to National Semiconductor’s Application Note AN-1113 for that. It’s the note that we referenced earlier. It's at the lower corner of one of the presentation slides, and that will be in a downloadable version as well.
Slide 20
The Skin Effect and the Proximity Effect combine to limit the current carrying area of the conductor to a very small part of the conductor’s cross-sectional area. The areas of current flow are actually much smaller than shown here.
Slide 21
As if the Skin Effect and the Proximity Effect were not enough, high frequency circuits carry yet another problem in the form of EMI. The problem is two-edged: signal radiation and signal pickup. Governments of virtually all modern nations regulate the amount of interfering energy that can be radiated. This is good because it means there is less energy to be picked up by our circuits and interfere with them. However, we still must guard against our circuits radiating energy at unauthorized frequencies and good design practice also says we should design our circuits to resist pickup of interfering signals. After all, you never know when a circuit might be exposed to a high field environment. When outgoing and return currents flow, there is a loop area that is defined by the area between the conductors. The larger this area is, the larger is the electromagnetic field fringing around the conductors. EM fringing is the cause of radiation; so larger loop areas will radiate and/or pick up more energy than will smaller loop areas. Since high frequency currents flow in a restricted area of a ground plane, that path acts pretty much as a trace and can radiate, especially when the current path through the ground plane is forced to deviate from the outgoing current, as is most often the case with a split ground plane. We tend to cover open areas on printed circuit boards with grounded copper. However, if we ground the copper area at a single point, we could cause radiation by creating an antenna.
Slide 22
The rationale behind covering open areas with grounded copper is to get as much area as possible between ground plane and power plane. This will provide a high power plane to ground plane capacitance -- that is to say a high capacitance between two planes. That is much more effective than is a physical capacitor. We do this because of the non-ideality of physical capacitors -- a subject for a different presentation. However, areas of copper that are grounded at only one point, as seen here, act as a monopole or a whip antenna. Here we see a cross section of the printed circuit board as seen from the edge of the board if we cut it at the blue line. Can you locate the antenna? Well, it’s not too hard when it’s highlighted there, is it? Any signal current that flows through the point in the ground plane where this grounded area is connected, and that is within the bandwidth of that antenna, is fed to that antenna and radiated. Of course, the antenna is rather small, so it may be harmonics of ground plane energy that is radiated. These antennae can also pick up electromagnetic field energy and feed that energy into the ground plane. Unless the field is very strong, however, there may not be enough energy to have a detrimental effect. Of course, you never know, as we said before, if your circuit might be subjected to a high field strength environment. Using copper areas that are ungrounded altogether is also bad because not only do these isolated conductors serve no useful purposes, they can act as directors to focus and enhance signal energy or as reflectors to reflect energy back to a main antenna element, which may be another signal line. I will refer you to any antenna texts. The bottom line is that copper areas should neither be left floating nor should they be grounded at only a single point. Grounded copper areas should be connected to ground at rather close intervals, generally no more than about an inch spacing, forming a grid on the grounded surface.
Slide 23
We already alluded to the fact that the split ground plane can lead to problems when lines carrying signal currents cross the split between the planes. Of course, analog components will be kept in the analog area of the board and digital components in the digital area. This keeps analog and digital return currents away from each other. We have already seen that high frequency or high edge rate signals see a high resistance, even in a ground plane, so we know the need to keep analog and digital currents separated from each other. The layout shown here is one that I previously advocated and makes an attempt to isolate analog and digital ground currents. However, this layout ignores EMI effects. I have also found that this method works well up to 50 Msps for 10-bit A to Ds and to about 30 to 35 Msps for 12-bit ADCs. Beyond that we see excessive circuit noise. The split ground plane can also lead to signal radiation, as we will see.
Slide 24
Here is a board with a split ground plane, as I have previously advocated. It can be effective in limiting the path of ground currents to desired areas and minimizing ADC noise. However, when we use supply traces to control analog and digital power paths, we see that the return ADC current must deviate from the outgoing current path. This produces a current loop area that can radiate. Now you say, “This should not be a problem with DC.” Keep in mind, however, that this DC line does contain signal currents. If they did not contain signal currents, you would not need to use bypass capacitors.
Slide 25
We can eliminate the loop area problem and minimize the radiation problem by using both a ground plane and a power plane. This allows the outgoing and return currents to flow close to each other and minimize RFI/EMI problems. The problem now, however, is that component placement relative to other components is very important as common analog and digital return current paths can lead to digital noise in analog circuits. Look at this carefully. Note that the yellow line is the power supply line to this particular digital area -- and the blue line is a power line to the ADC, considered to be analog. The return current paths and the ground plane immediately below have a rather large area where they coincide. So the digital energy in the ground plane can interfere with the ADC as the ground moves around.
Slide 26
If we remember that the proximity effect causes outgoing and return currents to flow as close to each other as they can, we realize that we can control the path of return currents in the ground plane by careful placement of the components and thoughtful routing of all traces, including those of the power supply. Ground return currents will follow their respective outgoing traces of course, and thus we can keep analog and digital return currents away from each other.
The single ground plane eliminates loop areas and the signal and power traces control current flow, even in the ground plane. Analog and digital components should be located in their own, dedicated areas of the board. The power supply should be located at a board edge or corner between analog and digital areas. Layout of power supplies can be critical for noise performance, but that is beyond the scope of today’s presentation. Digital components, especially high speed, high powered digital components, must not be placed on or near the path that analog return currents follow in getting back to the power supply. That is, they should not be located near lines carrying analog currents or power supply lines to analog or mixed-signal components. Remember that power supply lines carry signal currents because they recharge bypass capacitors on the board. Their return currents must go through the common junction of a split ground plane, flowing away from the outgoing or power trace or path. This forms a loop area that will radiate. Sometimes this radiation can be picked up as low-level analog signals and can interfere with circuits handling low-level analog signals.
Slide 27
Here is a brief review of some important points we have covered. All signal-carrying lines are transmission lines. Beyond a certain length, we absolutely must treat them as such if we are to avoid signal distortion, timing problems, and jitter. Through holes in a transmission line create impedance discontinuities and cause reflections with their attendant distortion and noise problems. A through hole in a PCB has about 1 to 1½ nanoHenries of inductance, which can create problems. For example, at 14 bits and 80 Msps, the ADC14080, a coming 14-bit, 80 Msps per second ADC from National Semiconductor, will not tolerate bypass capacitors that are more than 2 to 3 millimeters from the bypass pins. Putting these capacitors on the opposite side of the board results in capacitors being isolated from the ADC by the ¼ to ¾ Ohms at 80 MHz of the through hole inductance, plus another ¼ Ohm or so in the trace inductance. This means we can have up to 1 ohm between capacitor and its bypass pin, not very effective for bypasses. Layout is critical for transmission lines as they can experience impedance discontinuities when other lines approach them and depart from them. This is true even of the return current paths in the ground plane.
Slide 28
We have shown that a PCB trace can become a transmission line at a surprisingly short distance. Digital rise time, not repetition rate or frequency, is what we use to determine maximum trace length before it must be considered a transmission line. For analog signals, it is common to use ¼ of the period of the highest frequency component in the signal in place of rise time.
Slide 29
Here is a summary of the rules for maximizing high speed ADC and mixed-signal performance. Much of this takes us back to what some of us learned in school but never really used or thought much about.
Slide 30
Here, I have two books for recommended reading. The first one should be in every engineer’s library, whether she or he be an analog or a digital engineer. I feel this book should be entitled “High-Speed Design” (not necessarily digital, but just high-speed design) because the principles here apply to analog electronics as well. As a matter of fact, the principles are taken from analog electronics and applied to digital. The authors’ premise is that they are presenting to digital engineers what every analog engineer knows. While this may be true in general, not all of us analog engineers apply all of the principles presented in this book. Some of us don’t even think very much about them. The second book here used to be known as “The Blue Bible” of data conversion products and systems. While it has some great information, it is somewhat outdated and lacking current information. It is, however, a good book to help understanding fundamental ADC and DAC principles and some specifications.
Slide 31
National Semiconductor is just as committed to providing useful information to our customers as we are to providing leading edge solutions in silicon. Visit out Data Conversion Website for a lot of useful information. Check out this Website periodically as we are continually adding to it and making improvements to it. We believe we have an extremely useful Website. Visit us and click on feedback at the bottom of the page and let us know what you think. Please be sure to mention that it is the ADC Website about which you are making comments so that we know what department to send it to. We welcome all feedback, positive and negative, that will help to make this site more useful for you. Some of the very useful things there include a Data Conversion Calculator where you can determine relationships between various dynamic parameters and determine the minimum resolution needed for a given performance level. The Definition of Terms will help to take mystery out of specifications. Our evaluation boards and WaveVisionÔsoftware provide the easiest means available to evaluate the performance of our ADCs. The technical articles and presentations can offer help in gaining more design knowledge. The technical support link serves to get your technical questions answered quickly. Of course, you can also contact your distributor and ask to speak with an application engineer if you need technical assistance.
Slide 32
This is a summary table of National Semiconductor’s current high speed ADC offerings, as well as some products, in red, that are coming. This table only shows high speed A to Ds, but we also have lower speed products and will be expanding our lower speed offering and adding more DACs to our portfolio. National is committed to the data converter business. Watch for our future offerings.
Now, we realize that this is kind of hard to read; the type is kind of small. But, when you get your downloadable version, you’ll be able to see it much more easily.
Slide 33
Now for a summary of what we’ve talked about today. We discussed some concepts that are generally considered part of the analog world, but can have impact in digital areas as well. We did not exhaust the subject by any means. The material here is very basic and introductory in nature. Also, there are other effects that we did not discuss. For example, power supply bypassing is a rather big area that most of us consider trivial. But that is another subject. We presented some questions throughout the presentation to help solidify the principles in your minds. This presentation will be available, as we said, on our Website, and includes a Glossary of Terms that should prove useful to you as you do self-study in this area.
Slide 34
Thank you for attending our seminar. We will now answer any questions that have not already been addressed.
QUESTIONS:
Q: With regards to the Skin Effect, what happens when AC current is biased with a DC current? That’s to say you have AC riding upon the DC.
A: The DC will tend to flow pretty much throughout the conductor, as you would think. However, what you need to realize is that while there is a DC component, what you have is really AC that is biased up above or below ground so that you do not cross-ground. So the total current is still varying, and it still has to be considered an AC current. Another question.
Okay, Q: does not having a power plane reduce the decoupling capacitance between power and ground?
A: Yes, it does. It will reduce the capacitance. For this reason, it might be a good idea, where it’s practical, to have at least a partial power plane. However, that can be difficult, and it’s a little bit beyond what we have time for today. But yes, it will reduce it and that’s not really desirable. As you know, in electronics, everything is a trade-off; it’s a series of trade-offs everywhere you go. But, to answer the question succinctly, yes, that capacitance will be reduced, and so other things have to be taken into consideration. And this is why very often you need to have as many as three different bypass capacitors of different values in order to do an effective job of bypassing.
Q: Does use of a single ground plane help at low frequency designs below 1 MHz, too?
A: Yes, it can. Below 1 MHz, the effect is not going to be as great, but it can help. I would generally say that you’re better off with a single ground plane than with a split ground plane. And the reason for that is to avoid radiation problems.
Okay, before we go ahead, I’d like to call your attention to the fact that we have launched a survey, and we ask everybody to, if you please, to fill that out. This information helps us to design products that you, our customers, desire, and also to make presentations that you find most useful.
Okay, another question:
Q: How about splitting both the ground and the power planes?
A: If you split both ground and power planes, what you’re doing is keeping the integrity of the current flow, or attempting to do so. However, when you do that, you still have signal lines that you may find necessary to cross the split, and that’s not desirable. You’re better off really just avoiding the split planes altogether. And I’m saying that, but as I mentioned before, sometimes you want to have an area of a plane, although that plane would not cover the entire board layer. When you do that, you have to be careful, however, because you don’t want to create problems with loop areas that are going to give you radiation problems. And you also don’t want to force currents to flow into each other where they’re going to create noise.
Okay, Q: how do you calculate propagation rate?
A: Now, that is covered to some extent in Application Note 1113 as well, as well as a few other application notes that I don’t recall their numbers. But basically, what it amounts to is you’re looking at the inductance of the line and you’re looking at the capacitance. And that’s covered fairly well in some advanced texts. I can’t recall the exact formula right now; it’s been so long since I’ve looked at that,. I don’t really worry about it. As a general rule, FR4 material, depending of course exactly on how you configure your layout, it’s somewhere in the vicinity of 150 picoseconds per inch, or about 60 picoseconds per centimeter.
Q: Is there a way to place test points, vias on a signal, on 3-GHz signals? I’m trying to perform in-circuit testing on a PC board with high-speed signals, but I need test points for my fixture.
A: Ah, well, I’ll tell you. I don’t like the idea of doing that because what you’re doing is you’re adding an impedance discontinuity. Whatever you’re using to test is going to have some finite impedance to it. And as soon as you put that on that -- let’s say you’re just putting it on a trace; let’s say you don’t have a test point; let’s say you have a trace. You have an impedance discontinuity there. Typically, it will be a lot higher than is the trace impedance, but nevertheless, it’s a discontinuity and it can create problems. As far as putting a test point there, I would prefer a surface mount test point if you really have to put one there. But be careful. It doesn’t take a very tall test point for it to be a stub. If it’s at the right length, it looks like a short. If it’s at the proper length, it can look like an open. So, you got to be really careful about the length of these things. And if you have a broadband signal, if it’s very broadband, for example, you’re talking 3 GHz, if you’re going down to 1 GHz, and up to let’s say 5 GHz, you could find that at part of that band you’re going to have a short and part of that band you’re going to have an open, and it’s going to create havoc with your signal. I don’t have a real good answer for that one. I just don’t like the idea of probing anything at that kind of frequency.
It seems like there is kind of a common question here. So, I think we should answer this one:
Q: Where can you get -- from where can we download the slides?
A: From the same point that you went to to get into this presentation. Towards the bottom of that screen, you’ll have an archive. It's there. You can also get it from our ADC Website: national.com/ADC is the shortcut to get to it. Okay, let me look for another question here.
Okay, here’s a pretty good question:
Q: “I’m hesitant about combining analog and digital ground plane. Can you elaborate on when to do this?”
A: I would say do it always, but you have to be really careful. You have to keep all your analog and digital traces, anything carrying analog currents separate from anything carrying digital currents, on your board. The proximity effect is going to force the current in the ground plane to follow that path. So, you’re not going to get a lot of bleeding, if you will, away from that. There will be some, but it’s not going to be a lot. So, the key is to keep analog and digital signal lines separate from each other.
Q: When, if ever, are power planes useful?
A: Power planes are useful to getting large distributed capacitance, which is a lot more effective than physical capacitors, which are far from ideal. Power plane and ground plane together form pretty much an ideal capacitance. The problem, however, in doing that is that you cannot control where the currents are flowing. So, I would say they’re useful for very low frequencies where you don’t have a big problem and/or in systems that have very, very low current levels where all your components have very low current so that you don’t have any very large ground currents flowing in the ground plane and creating a large signal drop across the impedance of the ground plane as its flowing. So, basically, very, very low power level circuits. What level? It’s hard to say. I would say that’s more empirical. If you’re designing battery-operated equipment with just a few components in it. That’s probably going to qualify.
Q: How do you connect multiple ground planes, traces, or large areas of copper?
A: I don’t recommend multiple ground planes. I recommend one ground plane. If you’re talking about two layers, two or more layers on a board that are ground, then what I would do is connect them together with vias at many points, typically a couple of centimeters apart, no more than a couple of centimeters apart, you know, something like that two centimeters, one inch, something in that area. That’s what I would recommend. That way the two grounds are tied intimately together. If you don’t tie them together at close enough intervals, you’re going to find that you end up with a lot of ground loops and power being dissipated in those loops within the board. The peding problem is not going to be very significant, although there will be some. But you’ll have power loss and you’re going to have some inefficiency, and that can be reflected in your signals as well. So, you can end up with signals that are lower level than you expected them to be otherwise.
Q: For very high-speed transmission lines, is putting the signals in the inner-layer between ground plane recommended?
A: Yeah, this is your -- what is it, microstrip or stripline? I think it’s stripline technique ---- that’s what that is. Yes, it is helpful. It helps to confine the field around that signal line pretty much the same as a coax will do. So you end up with less EMI problems, both from a radiation and from a pick-up standpoint. So yes, it can be helpful. Depending on the amount of current that you have in that line is whether you really need to do that, however. And sometimes it’s helpful; sometimes it doesn’t really make a lot of difference.
Okay, we’re looking for questions that have more or less more versatile appeal.
Q: Does National’s high-speed duals compare to competition, specifically in channel matching and noise in the ADC 10 D zero 40 and 12 D zero 40?
A: Yes, they do. They compare quite favorably as a matter of fact. You probably are aware of the fact that dual A to Ds are very difficult to design and keep the channels separated. The ADC 10 D zero 40, when you look at the graph of cross talk versus frequency, you would expect that as frequency gets higher, that you’re going to see more cross talk. And that’s normally the case. But, with the 10 D zero 40, what we’re really looking at is the noise floor. The cross talk is down in the noise floor so that we can’t really see it. So, when you’re looking at the amount of energy at that frequency, you’re looking at the noise floor. So therefore, the graph tends to be flat; it looks like it’s flat. So that’s quite impressive; it’s quite impressive. And you can test that yourself. As a matter of fact, I would suggest that what you might do is get hold of our Evaluation Board and take a look at that; it’s quite revealing and very interesting to see. It’s almost unbelievable. But, when you see it for yourself, you know, you’ll become a believer. The isolation is excellent in our duals. That’s one of things that we target for our duals because it is necessary. A dual that does not have good cross talk isolation is going to be of limited usefulness.
Q: I’m adding a great many through holes to a circuit board for in-circuit testing, the ADC outputs at 48 KHz. Am I in a danger zone?
A: 48 KHz, you’re probably not going to have a problem. But I can’t say you definitely won’t. I would like to try it. But you should be okay depending on a lot of things, and it’s really too much to quantify. For something like that, I would really like to see a proposed layout and a schematic so I can understand exactly what you’re doing. But at 48 KHz, a low-speed product, you’re probably not going to have much of an issue. However, you do want to be careful about the length of your line and the separation of these through holes. If whatever through holes you have on a given line tend to be evenly spaced, from a theoretical standpoint, I would think that that’s probably going to minimize the problems, but not necessarily so. The theory does not always match up in practice until you start realizing there’s something else in theory that you did not consider.
Q: at what point should be considered as high frequency, high speed?
A: The question is 14 MHz? 14 MHz is definitely high speed when it comes to the issues that we talked about today. The Proximity Effect and the Skin Effect, for example.You can start seeing the Skin Effect somewhere in the vicinity of 400 to 450 KHz. It becomes significant somewhere in the vicinity of about 3 MHz so that your AC resistance is going to start being a lot higher than is your DC resistance. So, I would say, yes. At 14 MHz, it’s definitely high speed, high frequency. Now, some of the consideration that you have at 14 MHz are not going to be as serious as those you have at 1 GHz, naturally.
Q: How best to route analog signals, that is, comparator outputs to the digital circuits?
A: Comparator output is really a digital output. A comparator is your basic, very basic mixed-signal circuit. It has an analog input -- or analog inputs -- and a digital output. So the output is digital, and it should be considered as digital. Now, the question becomes, I have analog inputs and I want the inputs in the analog area and outputs in the digital area of the board.
Well, you have to locate as best you can the comparator as close as possible to the line, let’s say, between analog and digital so that you can do that. Now, if you have let’s say a quad comparator, you’re going to find that you have analog and digital all the way around that package, so it becomes a little bit more difficult. The key here is to try to limit the amount of current that you have in that digital line. So, what you might do is -- is to somewhere along the line put a buffer so that you’re driving a buffer, and then that buffer is located in the digital area. Say, just something like a, I don’t know, 7406 or 04 or a single -- a number of companies make single gate versions of these things. And that way you don’t have a lot of current flowing. Now, of course, if what you’re driving is high impedance, you still don’t have too much problem with current flow.
Q: How should we treat the earth ground, digital ground, and analog ground? Should they be tied together?
A: Well, as I've indicated in this presentation, I like a single unified ground. As far as earth ground is concerned, it’s very difficult to have electronic equipment at earth. You take a building, for example, and you look at power company ground, you know, your green wire within a building. If you go out and if you could manage to put one side, common side, of a multi-meter into the ground outside your building buried good and deep, you know, with a real long copper probe so you get good contact with ground, and then you measure the potential between that point and any outlet within a building, you’re going to find you could have two, three, four, five, six, seven volts difference. Usually it’s AC, but there could be a DC offset there as well. So, having a piece of electronic equipment at earth ground is a daunting task. It's just not practical. If you need to have it there, do the best you can and realize it’s not going to be perfect. But for analog and digital ground, I like to have a single ground. It becomes a problem in some areas, so you have to be really, really careful what you’re doing. And unfortunately, there’s not enough time to get into all of that. I’d love to write a book on this, but that’ll have to be for some other time.
Q: what kinds of techniques are available to sample 40 GHz signal?
A 40 GHz. Well, I’ll tell you. I think you just about have to design your own sampler. I think you’re talking about a digitizer, I guess, an A to D. I don’t think there is anything available, at least nothing that I’m aware of that can handle a 40 GHz signal. Not with any fidelity anyway. The highest I’ve heard is somewhere around 10 or 12 GHz. But 40 GHz, I don’t know. I’m sorry. I can’t answer that question adequately.
Q: When will the presentation be available for download?
A: It should be available for download today. I don’t know how soon, but shortly after the presentation is over. So, you’ll be able to access that let’s say within two to three hours anyway. Okay, let’s look for another question that seems to be kind of common.
Q: One quarter of highest frequency for analog repeat.
A: what I said was that if you’re looking at an analog signal and you want to consider how long your line can be before it has to be considered a transmission line, rather than rise time in that formula, which was rise time divided by six times your propagation rate across the board, rather than using rise time, use ¼ of the analog period. Now, the rationale behind that is if you looked at an analog signal, if you looked at a sign wave -- a pure sign wave -- and you looked at the slope going through your zero crossing, that slope is at approximate rate that you would have with ¼ of the frequency. I’m sorry, ¼ of a period. So that’s an approximation; it’s not exact. But it tends to work, so it is in common use. A lot of people use that.
Q: you say that bypass caps on the bottom are not very effective. Is there a good position to put them when there is restricted board space?
A: I would put the bypass caps on the top and put other things on the bottom. For example, a latch at the output I would put at the top. If you’re dealing with high frequency, this is important, especially high frequencies and high-resolution circuits. If you’re talking about relatively low frequencies, it’s not as important simply because of the fact that the one to 1½ nanoHenries of inductance does not present a serious impedance in series with the capacitor. I would say (this is simply a guess) I would say 10, maybe 15 MHz and below, and at, let’s say, 10 bits maybe, and 12 might be a stretch. With 10 bits, you’re probably going to be okay. But I would try it if you had to, realizing that you may have to go another route. We’ve had some issues with this, and I found that at 14 bits, 80 Megasamples per second is a problem. At 14 bits and 7 Meg it’s not a problem, okay? So, it depends entirely upon the resolution of your circuits and the speed you’re dealing with. But, I would put other components on the bottom. We have our ADC12D040 evaluation board for our 12-bit dual 40 Msps A to D has some bypass capacitors on the backside, and it does work pretty well for that resolution and that speed. We’ve also put some of the latches on the backside of that board, and that works quite well. So, we don’t have any real issues there. However, I would suspect that at 12 bits, 40 Msps it is probably starting to be a little bit marginal and going any faster or any higher in resolution probably would be a problem.
Q: What is the best way to reject external ground noise from entering your PCB?
A: The best way to reject external ground noise. Well, the best thing is to keep it out. And for this reason, you’d like to keep low impedance lines; high impedance lines tend to pick up more than do low impedance lines. And you also don’t want to have lines, especially long lines, that are not terminated. An unterminated line can be a high impedance at one end and relatively low at another end, and that can pick up more than will a line that is of constant impedance and is fairly low. For this reason, we like to deal with the 50-Ohm circuits; 25 Ohms is better, but when you have 25 Ohms it becomes a little more difficult to drive it.
Q: Am I to make sure that AN-1112 is the right one?
A: I am pretty sure it is, but let me look it up again to be absolutely sure. Okay, I’m sorry. It’s AN-1113, and it is not currently on our ADC Website. But if you go to the Website and you look at Application Notes, if you’ll click on “all ANs”, and you can get to it from there. Okay, it’s AN-1113, not 1112. I’m sorry for that error.
Q: Are series resistors on an output signal best placed near the source or near the load?
A: Okay, this is going to have to be our last question. It’s best placed near the source. The reason that you want series output resistors there are two-fold. Number one is you want to terminate the line. So, you have your output of your source, plus that physical resistor is the characteristic impedance of the line. And if it’s not close to that source, it’s not going to look like part of that source impedance, so you will not be properly terminated.
The other thing is, having a physical resistor there isolates the capacitance of the line from the driving source. So the driving source has an easier time driving that line. And so from two different standpoints, we end up with a better signal. Now, as far as the output of an A to D is concerned, we use that there primarily to limit the current in the output because that current causes noise in the A to D if you’re trying to provide a lot of current; the output charging / discharging capacitance. So, I think that’s pretty much it.
I think we’re going to have to cut it off now. We are at one hour. Any questions that were not answered I will e-mail answers out to those people and answer the questions. I presume everybody did enter their e-mail address into the system when you logged on.
Once again, on behalf of National Semiconductor, I want to thank you for being here for this presentation. I hope you found it useful. I would welcome any feedback in any manner that you want to send it. You can comment over the Web with our feedback form if you’d like, or you can have anything in our survey, some notes at the bottom of that if you’d like, which is still up right now; I believe it is. Or any other way you want to try to get it to us, we’ll be glad to entertain that. January 22nd we have our next Web-based seminar. It’s on buck converters, switch modes, and supplies; one type of switch mode supply. Even if you are not into power supply design, I would recommend that you at least try to get in on that. There is a lot that you can learn from knowing something about circuits that are in a system that you’re designing something that it goes into. One of the issues that we have with switch mode supplies is that they can raise havoc with A to Ds, which is a whole 'nother subject again, and there is so much we could talk about. But at any rate, so January 22nd, I’d encourage you to be in for that one.
And once again, thank you very much everybody. Good-bye.
(End of Presentation)
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