October 2, 2000 - National Semiconductor (NYSE:NSM) today announced the first in a series of IEEE 1149.1 JTAG (Joint Test Action Group) compliant LVDS (Low Voltage Differential Signaling) devices designed to work with boundary scan test systems. SCAN92LV090 is the first 9-channel Bus LVDS transceiver with integrated registers. The IC's architecture enables the application of automated boundary scan test functions used to verify the structural integrity of TTL (Transistor-Transistor Logic) and LVDS interconnects in datacom and telecom equipment.
"Worldwide demand for bandwidth in the form of high-speed communication connections has created a corresponding emphasis for high-performance infrastructures to support such services," said Guy Nicholson, National's marketing director of LVDS products. "Infrastructure products needed to support communication systems found in xDSL, 3rd generation wireless services and gigabit LAN end up consisting of very densely populated printed circuit boards with integrated circuits that cannot be checked with a historical bed-of-nails test. Boundary scan or JTAG testing is the practical answer.
Although differential interconnect is essential for such high-speed applications, no solution has been available until now for a differential signal interconnect test."
LVDS technology is ideal for point-to-point and multipoint data transfer in high-speed, low-power applications with dense backplanes and interconnects. The challenge in adding test circuitry to LVDS devices is to avoid altering the I/O characteristics that determine the speed. LVDS test solutions must coexist with the robust nature of differential technology and the fault tolerant features of our LVDS technology. The key to National's supplemental test for signal integrity is that it detects opens and shorts, which otherwise could not be isolated with just ones and zeros. Working together, the SCAN92LV090 LVDS transceiver and National's system test access products can easily validate the integrity of these interconnects.
SCAN92LV090 9-channel Bus LVDS Transceiver
The SCAN92LV090 with IEEE1149.1 test access allows several test modes to be selected to access the differential channels. With a high signaling rate capability above 100 Mbps, designers realize the full benefits of LVDS data transfer, including high speed, high noise immunity and fault tolerance. Receiver sensitivity is 100mV. The SCAN version is the same footprint as the non-SCAN version, allowing direct replacement into existing designs. New design layouts can include the SCAN signals, allowing an easy upgrade when the device enters the market.
The fully-compliant IEEE1149.1 (JTAG) device is available now in a 64-pin TQFP package and is $10.50 in units of 1,000. For more information, visit www.national.com/scan.
About Boundary Scan
As systems become more complex, multimillion-gate structures, smaller wire widths and dense interconnections limit physical access to test structures. Smaller geometry packages such as BGAs have also increased the need for new methods to ensure board and system testability. Many complex PLDs also use the IEEE 1149.1 interface for programming and configuration.
BIST (Built in Self Test) eases the burden by adding testing capabilities directly to the DUT (Device Under Test). Adding embedded system access will enable test and diagnostics to be conducted over the life of the system. Boundary Scan improves on fault coverage by providing a scan architecture around the boundaries of a chip. It is based on the IEEE 1149.1 Standard, which defines a 4-wire digital interface to a standard test access port on each compliant device. Boundary scan registers, added to each I/O pin, are connected serially to form a scan chain. Testing data is then sent through a TAP (test access port) input, shifted through the boundary scan chain, captured at the TAP output, and compared with an expected response. ATPG (Automatic Test-Pattern Generation) software can be used to initiate sophisticated patterns to ensure that multiple states are tested.
About National Semiconductor
National Semiconductor provides system-on-a-chip solutions for the information age. Combining real-world analog and state-of the-art digital technology, the company's chips lead many sectors of the personal computer, communications, and consumer markets. With headquarters in Santa Clara, California, National reported sales of $2.1 billion for its last fiscal year and has about 10,500 employees worldwide. Additional company and product information is available on the World Wide Web at www.national.com.
Editors Note: Technical paper on Boundary Scan is available from National on request.
