The Many Flavors of LVDS

John Goldie - Manager of Interface Applications

The LVDS standard for Low Voltage Differential Signaling is becoming the most popular differential data transmission standard in the industry. This is driven by two simple features of the bus, Gigabits @ milliwatts! It delivers the speed without consuming the power. In addition, it brings along a whole set of other benefits that include low voltage power supply compatibility, low noise generation, high noise rejection, robust transmission signals, and it allows for integration. For these reasons, it has been deployed across market segments wherever the need for speed exists. Even with all these benefits, there are some limitations in certain applications. These could be summed up with the following list of desires: support of multipoint bus configurations, operation from a lower yet power rail, and extended receiver common-mode range. This list of desires has spawned new variants of LVDS that in some cases push the performance even further into special applications.  This article provides general information and key parameters for the original LVDS standard and the new flavors of LVDS that are in the market place today.

Before describing the different flavors of LVDS, it is useful for the reader to have a basic understanding of different bus configurations.  The three common types of bus configurations are:

• Point-to-Point     
• Multidrop     
• Multipoint

Point-to-Point is the simplest bus configuration.  The source is at one end, then the interconnecting media, and at the other end is the termination and receiver.  Due to the clean signaling path, a point-to-point bus supports the highest data rates.  Gigabit links are easily possible with this bus structure.  This bus is also characterized by the single direction flow of information (simplex).  If information needs to flow in the other direction, then a separate channel typically carries that information.  With this approach, full duplex transmission can occur (information flows in both directions at the same time).  Crosspoints, repeaters and distribution buffers can be used to support many different applications with high-speed point-to-point links to expand their versatility.

Multidrop, as the name implies, drops the information off at several locations along the bus.  This is an efficient bus in interconnect terms when multiple locations need the same information.  The driver (source) is located at one end of the bus, and once again, termination is at the far end as in the case of the point-to-point bus. There are two or more receivers located along the bus.  These are connected to the main line with short interconnects called "stubs".  Stub lengths need to be minimal length to avoid adverse transmission line effects.  This configuration has a max data rate from 400 to 800 Mbps depending upon the stub effect and number of loads.

Multipoint is the most flexible bus because the information source can now be from any node on the bus (but from only one at a time) to all other locations on the bus. Since information can flow in either direction, or both directions when driven from the middle of the bus, the bus requires termination at both ends. The benefit of this bus is the interconnect density reduction because all nodes share a common bus. The negative side of this approach is that a control scheme or protocol overhead is required to control the bus.  Also if all nodes had important information to send at the same time, the problem becomes evident that only one can send at a time.  Some information will be late, as that driver would need to wait till it gains control of the bus. For this reason, multipoint buses tend to be used in master/slave applications and also test and maintenance buses.

Today there are many flavors of LVDS on the market from a variety of vendors.  Some devices are generic interface parts while others are much more application specific solutions.  The most common and "original" is LVDS which is defined in the TIA/EIA-644 standard.  There are also some others standards and vendor specific implementations that are similar to LVDS.  The next section describes these flavors.

LVDS
National Semiconductor first introduced Low Voltage Differential Signaling as a standard interface device back in 1994.  National realized that the demand for bandwidth was increasing at an exponential rate while users also desired reductions on power dissipation.  This exceeded the capability of RS-422 and RS-485 differential transmission standards in speed.  ECL (or PECL) was available at the time, but incompatibility with standard logic levels, negative power rails and high chip power dissipation limited its wide spread acceptance.  Thus, National invented of LVDS.

LVDS is differential, using two signal lines to convey information.  While sounding like a penalty, this is actually a benefit.  The cost is two traces (or conductors) to convey the signal, but the gain is noise tolerance in the form of common-mode rejection.  Since signal to noise rejection has been improved, this allowed for the signal swing to be dropped to only a few hundred millivolts.  The small swing enables faster data rates since the rise time is now shorter. Thus, achieving Gigabits @ milliwatts was possible. 

National brought this idea to the TIA TR30.2 Standards committee for standardization into an electrical interface standard similar to RS-422 and RS-485.  National played a key role in chairing the ad-hoc committee and also acting as editor of the standardization effort.  What was to become TIA/EIA-644 was approved in 1994 and first published in early 1995.  This original version of LVDS was primarily targeted at point-to-point applications up to 655 Mbps.  Multidrop applications were allowed by the standard as an option but not fully specified.

TIA reviews standards every 5 years and upon the review, they recently revised LVDS to the -A level.  The committee balloted and approved 644-A during the summer of 2000, and published it in early 2001.  Enhancements to the standard include further specifications to support multidrop applications, and also modified text in regards to maximum data rate.  The committee removed reference to 655 Mbps and replaced it with a discussion on edge rate, signal quality and transmission lines.  There is an example given that shows LVDS signaling operating into the Giga bit per second range.  The limiting factors are the driver transition time, and the interconnecting media and resulting signal quality, which are application specific. 

Because there are many parameters to a complete system interface standrd,The intent for TIA LVDS is to be referenced by a system interface standard (proprietary or open) that defines the other parameters. These parameters include functional, mechanical, and optional electrical parameters.  Mechanical parameters are mainly connector specifications (dimensions and pinouts) and functional is protocol and signal definitions. Electrical parameters would include the transmission media, bus configuration, and data rate. 

Today a wide variety of LVDS Interface devices are available from a variety of suppliers worldwide.  This includes simple PHY devices such as line drivers and receivers that convert between LVDS and LVTTL levels.  These are available from single channels in very small packages up to 9-bit wide or more channels in one package.  Serializer / Deserializer devices are also popular as they unleash the LVDS's speed capability and offer great system benefits.  These parts collect many slow-speed TTL signals and serialize them into high-speed LVDS channels.  The narrower LVDS interface saves connector pins, reduces size and weight of connectors and cables, which both in turn reduce system cost.  The receiver devices deserialize the LVDS signals and generate the wide TTL bus at the destination.  Throughput of these parts is tremendous, the National DS90CR483 and DS90CR484 chipset delivers more than 5 Gbps of bandwidth over only 9 pairs. 

The popularity of LVDS signaling is increasing every year.  Many other application specific devices are replacing power burning and noisy CMOS logic or LVPECL interfaces with LVDS.  This includes LVDS interfaces on custom telecom ASICs, and ADC devices to name a few.  

There are some limitations to LVDS, such as its +/-1 V common-mode range, and also its intended load of a single 100-Ohm termination.  For this reason, other applications have adopted LVDS-like signaling optimized for other applications.  The common ones of these are discussed next.

BLVDS (Bus LVDS) - National Semiconductor
Desiring to extend the benefits of LVDS, National invented Bus LVDS (a.k.a. BLVDS).  This was targeted at heavily loaded backplanes where card loading and spacing lowers the impedance of the transmission line as much as 50%.  This loading effect, and the need to terminate the bus at both ends for multipoint applications, required a change to the driver's output.  National boosted the output three fold to the 10-12 mA range.  A 100-Ohm transmission line, loaded down to 54 Ohms by the cards, would then need to be terminated at both ends in 54 Ohms.  Thus a driver would see the two terminations in parallel and need to drive a load of 27 ohms minimum (higher is acceptable also).  Thus for LVDS signaling levels, with a 27 ohm load, 12 mA is needed to generate 325 mV swing.  Other improvements were made to the driver to further match the drivers output impedance and to make it contention safe.  This has changed the world of backplane driving, the old solution was to throw more current at the problem (i.e. GTL uses 40 to 80 mA), while BLVDS reduces output current to the 10 mA range. 

Today there are three classes of BLVDS parts offered by National.  The first is standard transceivers for multipoint buses.  National offers these in single, quad, or nine channel versions. The card connectors, and stub lengths will limit signal quality in this type of bus configuration to the 200 to 400 Mbps range, which is still an impressive 2X to 4X of single-ended GTL or BTL based systems. The next class is SER/DES devices that serialize data and clock into a single serial stream. The bus configuration for serial streams can be multidrop (if data rate is less than 400 Mbps) or point-to-point (typically for data rates greater than 400 Mbps) applications. The connector pin savings, and in some cases fewer backplane layers, can offer huge system cost savings. The third class is special functions devices.  These solve special problems such as bus repeating, redundant path cross-overs, and crosspoint switches.

BLVDS has addressed a wide market space ranging from telecom infrastructure and datacom to storage applications where card density demands high-performance backplanes.

Several vendors now offer BLVDS like devices, and its popularity is increasing every day.

M-LVDS
The TIA TR30.2 standards group has recently completed work on a new electrical standard called Multipoint LVDS (M-LVDS).  This standard is expected to be published in early 2002 and will be known as TIA/EIA-899.  It recognizes the limitations of LVDS and expands its applicability to double terminated bus configurations and also extends the common-mode range to +/-2 V.  Noting the multipoint bus configuration and resulting stubs, the standard notes a 500 Mbps maximum data rate.  500 Mbps is considered the upper bound and assumes a loss-less media and the fastest driver edge rate.  Practical implementations with cables and backplanes will be limited to the 300-400 Mbps range depending upon application details like stub length and required signal quality. This standard is very similar to BLVDS in output current and requires an output current of 9 to 13 mA.  This standard addresses cabled connections, backplanes and even a mix of cables and backplanes.  Across long cables, the chance of ground potential differences increases as does the likelihood of coupled noise, so the M-LVDS standard doubled the common-mode range of LVDS to +/-2 V for additional robustness.  Devices conforming to this standard are expected in 2002 from several vendors.

GLVDS
GLVDS (Ground referenced LVDS) was a development project by a major telecom company.  It is unique in that its signaling is similar to LVDS except the driver output voltage offset is closer to ground potential.  The thought here is it can be designed with chips with very low power-supply voltage rails, which can be as low as 0.5 V in a sub micron CMOS process.

GLVDS was recently brought to the JEDEC standards committee for possible standardization.  Standardization of GLVDS has not happened as of this writing.

JEDEC has recently completed work on another standard that has some of the same attributes of GLVDS.  It is known as SLVS, which stands for "Scalable Low-Voltage Signaling for 400 mV" (JESD8-13) and was published in October 2001.  This interface is terminated to ground, and has two options for drivers and receivers.  Receivers can be either single-ended or differential, and drivers are either for point-to-point or multidrop applications.  Data rates are in the 1-3 Gbps range but only over extremely short distances of less than 30 cm.  This limits the interface to fast chip-to-chip connections only.  Due to the 400 mV swing and ground reference, the power supply rail is only 0.8 V, thus the interface is compatible with low voltage cores found on sub-micron ASIC chips.

IEEE1596.3
IEEE 1596 is an application specific standard called SCI (Scaleable Coherent Interface).  It defines the complete bus by defining bus width, data rates, protocol and more.  The original version of the standard specified an ECL Interface.  But wanting to reduce power and foster integration, the dot three (.3) standard was developed.  This work was ongoing during the same time frame as the original TIA LVDS work.  The dot three standard also specifies LVDS line driver and receiver very similar to the TIA generic standard.  It does differ in some requirements and test conditions but concept wise they are very similar.  National also helped introduce this standard to the industry and was the project's editor. 

LVDM - TI
Texas Instruments has produced a family of parts also designed for double 100-Ohm termination applications.  The driver's output current is two times standard LVDS,  or 6 mA nominal.  Thus with a 50 Ohm load, LVDS-like levels are obtained.  This can be used for bi-directional point-to-point buses, or in very lightly loaded multipoint buses.  The signal swing is too small for heavily loaded backplanes in most cases.  A heavily loaded backplane can have loaded impedance as low as 27 Ohms, so the 6 mA drive does not generate a large enough swing.

Quick Comparison to other Differential Standards
There are several other differential standards that are commonly used, these are compared in the table below. 

Conclusions
LVDS is poised to become even more popular in the industry due to its benefits and forward compatibility with ever decreasing power supply magnitudes.  It is also friendly in regards to EMI and power dissipation performance.  The new flavors of LVDS extend it applicability even further into a wider range of applications.  The future will bring even higher line speed capability and operation at lower voltages along with increased integration. 

References
1. ANSI/TIA/EIA-644 LVDS Standard
2. ANSI/TIA/EIA-644-A LVDS Standard
3. ANSI/TIA/EIA-899 M-LVDS Standard
4. IEEE 1596.3-1995 LVDS for SCI Standard
5. JEDEC GLVDS Specification, Rev 1.0
6. JEDEC SLVS (JESD8-13) October 2001
7. TI SN65LVDM176 Datasheet, SLL320A - Dec 1998
8. NSC DS92LV090A Nine Channel BLVDS Transceiver Datasheet

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