Features • Complete CODEC and filtering system (COMBO) including: • Transmit high-pass and low-pass filtering • Receive low-pass filter with sin x/x correction • Active RC noise filters • µ-law or A-law compatible COder and DECoder • Internal precision voltage reference • Serial I/O interface • Internal auto-zero circuitry • µ-law, 16-pin-TP3054 • A-law, 16-pin-TP3057 • Designed for D3/D4 and CCITT applications • ±5V operation • Low operating power-typically 50 mW • Power-down standby mode-typically 3 mW • Automatic power-down • TTL or CMOS compatible digital interfaces • Maximizes line interface card circuit density • Dual-In-Line or surface mount packages • See also AN-370, "Techniques for Designing with CODEC/Filter COMBO Circuits" Description The TP3054, TP3057 family consists of µ-law and A-law monolithic PCM CODEC/filters utilizing the A/D and D/A conversion architecture shown in Figure 1, and a serial PCM interface. The devices are fabricated using National's advanced double-poly CMOS process (microCMOS). The encode portion of each device consists of an input gain adjust amplifier, an active RC pre-filter which eliminates very high frequency noise prior to entering a switched-capacitor band-pass filter that rejects signals below 200 Hz and above 3400 Hz. Also included are auto-zero circuitry and a companding coder which samples the filtered signal and encodes it in the companded µ-law or A-law PCM format. The decode portion of each device consists of an expanding decoder, which reconstructs the analog signal from the companded µ-law or A-law code, a low-pass filter which corrects for the sin x/x response of the decoder output and rejects signals above 3400 Hz followed by a single-ended power amplifier capable of driving low impedance loads. The devices require two 1.536 MHz, 1.544 MHz or 2.048 MHz transmit and receive master clocks, which may be asynchronous; transmit and receive bit clocks, which may vary from 64 kHz to 2.048 MHz; and transmit and receive frame sync pulses. The timing of the frame sync pulses and PCM data is compatible with both industry standard formats.

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Datasheet

Title		Size	Date	Other Language
	TP3054, TP3057 Enhanced"" Serial Interface CODEC/Filter COMBO(RM) Family""	250 Kbytes	9-Mar-96

Featured Application Notes

Title		Size	Date	Other Language
	AN-370: AN-370: Techniques for Designing with CODEC/Filter COMBO Circuits (101 Kbytes; 04-Nov-1995)	101 Kbytes	25-May-06
	AN-503: AN-503: COMBO II Codec/Filter - Who Says Analog Can't Shrink (131 Kbytes; 04-Nov-1995)	131 Kbytes	25-May-06

More Application Notes

Title		Size	Date	Other Language
	AN-316: The Subscriber Line Card in a Distributed Control Switching System	171 Kbytes	4-Nov-95

Part Number(s) (NSID)	Top View	Availability	Current Reported Stock	Budgetary Pricing	Standard Pack Size
TP3054WM/NOPB RoHS	SOIC WIDE	Full production Lead Time: 6 weeks	Distributor Region Qty DIGIKEY Worldwide 222 FUTURE Worldwide 1100	$2.35 each at 1K+ pcs	rail of 45
TP3054WM-X/NOPB TP3054WM-X RoHS	SOIC WIDE	Full production Lead Time: 8 weeks	Distributor Region Qty ARROW Worldwide 190 AVNET-EM Worldwide 36 DIGIKEY Worldwide 0	$2.37 each at 1K+ pcs	rail of 45
TP3054WMX/NOPB RoHS	SOIC WIDE	Full production Lead Time: 6 weeks	Distributor Region Qty DIGIKEY Worldwide 0 FUTURE Worldwide 1100	$2.35 each at 1K+ pcs	reel of 1000
TP3054N/NOPB TP3054N RoHS		Full production Lead Time: 8 weeks	Distributor Region Qty ARROW Worldwide 425 AVNET-EM Worldwide 565 DIGIKEY Worldwide 0 FUTURE Worldwide 1100 NEWARK Americas 103	$2.86 each at 1K+ pcs	rail of 25

Obsolete Versions

Obsolete Part	Alternate Part or Supplier	Source	Last Time Buy Date
TP3054N-X	A30S54	NATIONAL SEMICONDUCTOR	16 Nov 2008

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
TP3054N	P2CMOS	0	49735	0	1	4330000	2	556689228
TP3054WM	P2CMOS	0	49735	0	1	4330000	2	556689228
TP3054WM-X	P2CMOS	0	49735	0	1	4330000	2	556689228
TP3054WMX	P2CMOS	0	49735	0	1	4330000	2	556689228

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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Obsolete Versions

Obsolete Part	Alternate Part or Supplier	Source	Last Time Buy Date
TP3054N-X	A30S54	NATIONAL SEMICONDUCTOR	16 Nov 2008