Datasheet
RoHS Compliance Information
| Size in Kbytes | Date |
 |
| LPC662 Low Power CMOS Dual Operational Amplifier |
600 Kbytes |
7-Mar-01 |
Download |
LPC662 Low Power CMOS Dual Operational Amplifier (Japanese)
 |
558 Kbytes |
|
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Package Availability, Models, Samples & Pricing
| Obsolete Part | Alternate Part or
Supplier | Source | Last Time Buy Date |
LPC662AIN
| NONE
| NONE
| 08 Sep 1998
|
LPC662I MDC
| NONE
| NATIONAL SEMICONDUCTOR
| 01 Dec 2009
|
LPC662I MWC
| NONE
| NATIONAL SEMICONDUCTOR
| 03 Dec 2008
|
LPC662IN
| NONE
| NONE
| 08 Sep 1998
|
General Description
The LPC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 k and 5 k ) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 0.5 mW.
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
See the LPC660 datasheet for a Quad CMOS operational amplifier and LPC661 for a single CMOS operational amplifier with these same features.
Reliability Metrics
| Part Number |
Process |
EFR Reject |
EFR Sample Size |
PPM |
LTA Rejects |
LTA Device Hours |
FITS |
MTTF (Hours) |
|
LPC662AIM | P2CMOS | 0 | 49735 | 0 | 1 | 4330000 | 2 | 556689228
|
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LPC662AIMX | P2CMOS | 0 | 49735 | 0 | 1 | 4330000 | 2 | 556689228
|
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LPC662I MDC | P2CMOS | 0 | 49735 | 0 | 1 | 4330000 | 2 | 556689228
|
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LPC662IM | P2CMOS | 0 | 49735 | 0 | 1 | 4330000 | 2 | 556689228
|
|
LPC662IMX | P2CMOS | 0 | 49735 | 0 | 1 | 4330000 | 2 | 556689228
|
Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR.
The Long Term Failure Rates were calculated
at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress
temperature of 150°C to an application temperature of 55°C.
For more information on Reliability Metrics, please click here.
Design Tools
| Title | Size in Kbytes |
Date |
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| Amplifiers Selection Guide software for Windows |
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View |
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More Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-856: Application Note 856 A SPICE Compatible Macromodel for CMOS Operational Amplifiers |
121 Kbytes |
1-Oct-02 |
Download |
[Information as of 8-Nov-2009]
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