LP3929 - High Speed Bi-Directional Level Shifter and Ultra Low-Dropout CMOS Voltage Regulator and Line Protection

Datasheet	Packaging	Samples & Pricing	Reliability	Knowledge Base

Features

•	Ultra small micro SMD 24 bump package
•	6-signal level translation 1.8 V to 2.85 V
•	LDO stable with ceramic and high quality tantalum capacitors

Key Specification

Level Shifter:

Low-Dropout Regulator:

Protection Block (B Side):

•	6-signal Level Shifter (5 bi-directional and 1 uni-direction)
•	3 ns (typ) propagation delay
•	Channel-to-channel skew < 1 ns (max)
•	3.05 V to 5.5 V input range
•	2.85 V at 200 mA
•	Fast Turn-On time: 30 µs (typ)
•	110 mV (max) dropout with 200 mA load
•	Thermal shutdown at 160°C (typ)
•	Robust IEC ESD Protection: ±15 kV Air Gap, ±8 kV Direct Contact
•	ASIP / EMI Filtering

General Description

The LP3929 is designed for portable and wireless applications requiring level translation and power supply generation in a compact footprint.

The device level translates 1.8 V LVCMOS on the host (A) side to 2.85 V LVCMOS levels on the card (B) side for a miniSD / SD 4-bit bi-directional data bus.

Independent direct control of the CMD, Data0 and Data1-3 paths support mini SD state machine requirements. More...

Typical Application

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Typical Performance

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Block Diagram

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Datasheet

RoHS Compliance Information	Size in Kbytes	Date
LP3929 High Speed Bi-Directional Level Shifter and Ultra Low-Dropout CMOS Voltage Regulator and Line Protection	329 Kbytes	14-Dec-07	Download

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Package Availability, Models, Samples & Pricing

Part Number

Package

Factory Lead Time

Models

Samples &
Electronic
Orders

Budgetary Pricing

Std
Pack
Size

Package
Marking
Format

Type

Pins

Spec.

MSL
Rating

Peak
Reflow

RoHS
Report

CAD
Symbols

Weeks

Qty

$US each

LP3929TME-AACQ

MICRO SMD

NOPB

260

RoHS

Download

Full production

N/A

1K+

$0.89

reel
of
250

XYTT
I D57B

6 weeks

N/A

Obsolete Versions

Obsolete Part	Alternate Part or Supplier	Source	Last Time Buy Date
LP3929TM-18285	LP3929TME-AACQ	NATIONAL SEMICONDUCTOR	01 Nov 2007
LP3929TMX-18285	LP3929TMEX-AACQ	NATIONAL SEMICONDUCTOR	01 Nov 2007

General Description

The LP3929 is designed for portable and wireless applications requiring level translation and power supply generation in a compact footprint.

The device level translates 1.8 V LVCMOS on the host (A) side to 2.85 V LVCMOS levels on the card (B) side for a miniSD / SD 4-bit bi-directional data bus.

Independent direct control of the CMD, Data0 and Data1-3 paths support mini SD state machine requirements. A shutdown pin is provided for the level shifters and regulator. The f_CLK_A is a feedback clock to the host which can be used to overcome level shifter bus delay.

The built-in low-dropout voltage regulator is ideal for mobile phone and battery powered wireless applications. It provides up to 200 mA from a 3.05 V to 5.5 V input. It is stable with small 1.0 µF ±30% ceramic and high quality tantalum output capacitors, requiring smallest possible PC board area.

The card (B port) side channels have integration of ASIP (Application Specific Integrated Passives) - on chip integrated pull-up, pull-down, series resistors and capacitors for EMC filtering. It is designed to tolerate IEC61000-4-2 level 4 ESD: ±15 kV air discharge, ±8 kV direct contact.

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
LP3929TME-AACQ	CMOS7	0	18406	0	0	1089000	4	309006723

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

[Information as of 8-Nov-2009]