Features • Ultra-low power supply current drain (60 µA)-independent of the supply voltage (75 µW/comparator at +5 VDC) • Low input biasing current: 3 nA • Low input offset current: ±0.5 nA • Low input offset voltage: ±2 mV • Input common-mode voltage includes ground • Output voltage compatible with MOS and CMOS logic • High output sink current capability (30 mA at VO=2 VDC) • Supply Input protected against reverse voltages Description The LP339 consists of four independent voltage comparators designed specifically to operate from a single power supply and draw typically 60 µA of power supply drain current over a wide range of power supply voltages. Operation from split supplies is also possible and the ultra-low power supply drain current is independent of the power supply voltage. These comparators also feature a common-mode range which includes ground, even when operated from a single supply. Applications include limit comparators, simple analog-to-digital converters, pulse, square and time delay generators; VCO's; multivibrators; high voltage logic gates. The LP339 was specifically designed to interface with the CMOS logic family. The ultra-low supply current makes the LP339 valuable in battery powered applications. Applications • Ultra-low power supply drain suitable for battery applications • Single supply operation • Sensing at ground • Compatible with CMOS logic family • Pin-out identical to LM339

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Datasheets

Title		Size	Date	Other Language
	LP339 Ultra-Low Power Quad Comparator	229 Kbytes	23-Aug-00	日本語

Featured Application Notes

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Design Tools

Title	Size	Date
Amplifiers Selection Guide software for Windows

Reliability Metrics

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
LP339M	SLM	0	44046	0	0	3532500	1	1002356520
LP339MX	SLM	0	44046	0	0	3532500	1	1002356520
LP339N	SLM	0	44046	0	0	3532500	1	1002356520

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

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