RoHS Compliance Information	Size in Kbytes	Date
LM2524D/LM3524D Regulating Pulse Width Modulator	1078 Kbytes	2-May-08	Download
LM2524D/LM3524D Regulating Pulse Width Modulator (Japanese)	1199 Kbytes

Part Number

Package

Factory Lead Time

Models

Samples & Electronic Orders

Budgetary Pricing

Std Pack Size

Package Marking Format

Type

Pins

Spec.

MSL Rating

Peak Reflow

RoHS Report

CAD Symbols

Weeks

Qty

Qty

$US each

LM3524DM

SOIC NARROW

16

NOPB STD

1 1

260 235

RoHS

N/A

Full production

N/A

1K+

$0.58

rail of 48

NSUZXYTTE# LM3524DM

8 weeks

1000

LM3524DMX

SOIC NARROW

16

NOPB STD

1 1

260 235

RoHS

N/A

Full production

N/A

1K+

$0.58

reel of 2500

NSUZXYTTE# LM3524DM

8 weeks

5000

LM3524DN

MDIP

16

NOPB STD

1 1

NA NA

RoHS

N/A

Full production

N/A

1K+

$0.73

rail of 25

NSUZXYYTTE# LM3524DN

8 weeks

500

General Description

The LM3524D family is an improved version of the industry standard LM3524. It has improved specifications and additional features yet is pin for pin compatible with existing 3524 families. New features reduce the need for additional external circuitry often required in the original version.

The LM3524D has a ±1% precision 5V reference. The current carrying capability of the output drive transistors has been raised to 200 mA while reducing V_CEsat and increasing V_CE breakdown to 60V. The common mode voltage range of the error-amp has been raised to 5.5V to eliminate the need for a resistive divider from the 5V reference.

In the LM3524D the circuit bias line has been isolated from the shut-down pin. This prevents the oscillator pulse amplitude and frequency from being disturbed by shut-down. Also at high frequencies (≃300 kHz) the max. duty cycle per output has been improved to 44% compared to 35% max. duty cycle in other 3524s.

In addition, the LM3524D can now be synchronized externally, through pin 3. Also a latch has been added to insure one pulse per period even in noisy environments. The LM3524D includes double pulse suppression logic that insures when a shut-down condition is removed the state of the T-flip-flop will change only after the first clock pulse has arrived. This feature prevents the same output from being pulsed twice in a row, thus reducing the possibility of core saturation in push-pull designs.

Application Notes

Title	Size in Kbytes	Date
AN-694: Application Note 694 A DMOS 3A, 55V, H-Bridge: The LMD18200	408 Kbytes	26-Sep-02	Download
AN-694 (Japanese): Application Note 694 A DMOS 3A, 55V, H-Bridge: The LMD18200	400 Kbytes

More Application Notes

Title	Size in Kbytes	Date
AN-292: Application Note 292 Applications of the LM3524 Pulse-Width-Modulator	239 Kbytes	3-Oct-02	Download
AN-715: Application Note 715 LM385 Feedback Provides Regulator Isolation	50 Kbytes	3-Oct-02	Download
AN-288: Application Note 288 System-Oriented DC-DC Conversion Techniques	405 Kbytes	3-Oct-02	Download
AN-293: Application Note 293 Control Applications of CMOS DACs	385 Kbytes	4-Oct-04	Download
AN-272: Application Note 272 Op Amp Booster Designs	382 Kbytes	2-Oct-02	Download