DS90C032 - LVDS Quad CMOS Differential Line Receiver
Datasheet Packaging Samples & Pricing Reliability Models Application Notes Knowledge Base

Features
• >155.5 Mbps (77.7 MHz) switching rates
• Accepts small swing (350 mV) differential signal levels
• Ultra low power dissipation
• 600 ps maximum differential skew (5V, 25°C)
• 6.0 ns maximum propagation delay
• Industrial operating temperature range
• Military operating temperature range option
• Available in surface mount packaging (SOIC) and (LCC)
• Pin compatible with DS26C32A, MB570 (PECL) and
41LF (PECL)
• Supports OPEN input fail-safe
• Supports short and terminated input fail-safe with the addition of external failsafe biasing
• Compatible with IEEE 1596.3 SCI LVDS standard
• Conforms to ANSI/TIA/EIA-644 LVDS standard
• Available to Standard Microcircuit Drawing (SMD) 5962-95834

General Description

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90C032 accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. More...


  Typical Application
*click for larger image


ParametersValues
PHY Type Receiver
Family LVDS
Channels 4 Channels
Max Data Rate 155 Mbps
Input Compatibility LVDS
Output Compatibility TTL
Power Consumption_ 18 mW
SupplyVoltage 5 Volt
JTAG1149.1 No
Temperature Min -40 deg C
Temperature Max 85 deg C
Function Receiver

  Also Recommended
DS90C032B▲High Z On Power Off & Improved Failsafe
Additional Resources
Application Notes


Block Diagram

*click for larger image



Datasheet
RoHS Compliance Information Size in KbytesDate Click link below to Download
DS90C032 LVDS Quad CMOS Differential Line Receiver 354
Kbytes		 3-May-07 Download
DS90C032 LVDS Quad CMOS Differential Line Receiver (Japanese)
 323 Kbytes   Download
DS90C032QML LVDS Quad CMOS Differential Line Receiver 306
Kbytes		 9-May-07 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.


Package Availability, Models, Samples & Pricing
Part NumberPackageFactory Lead TimeModelsSamples &
Electronic
Orders		Budgetary PricingStd
Pack
Size		Package
Marking
Format
TypePinsSpec.MSL
Rating		Peak
Reflow		RoHS
Report		CAD
Symbols		WeeksQtyQty$US each
DS90C032TMSOIC NARROW16NOPB
STD		1
1		260
235		RoHS Download Full production
90c032tm.ibs		Samples
Buy Now 		1K+$1.01rail
of
48		NSUZXYTTE#
DS90C032TM
8 weeks1000
DS90C032TMXSOIC NARROW16NOPB
STD		1
1		260
235		RoHS Download Full productionN/A
 
Buy Now 		1K+$1.01reel
of
2500		NSUZXYTTE#
DS90C032TM
6 weeks3000
5962-9583401VFA
(DS90C032W-QMLV)		CERPACK16RoHS Download Full productionN/A
  CALLrail
of
19		NSZSSXXYYA
DS90C032W-
QV Q 5962-
9583401VFA
16 weeksN/A
5962L9583401VFA
(DS90C032WLQMLV)		CERPACK16RoHS Download Full productionN/A
  CALLrail
of
19		NSZSSXXYYA
DS90C032WL
QV Q 5962L
9583401VFA
16 weeks500
5962L9583401VZA
(DS90C032WGLQMLV)		CERPACK16RoHS Download Full productionN/A
  CALLtray
of
42		NSZSSXXYYA
DS90C032WGL
QV Q 5962L
9583401VZA
16 weeks500
DS90C032 MDRUnpackaged DieFull productionN/A
  CALLtray
of
N/A		-
N/A2000

Obsolete Versions

Obsolete PartAlternate Part or SupplierSourceLast Time Buy Date
DS90C032E-MIL
NONE
NONE
02 Dec 2003
DS90C032W-MLS
DS90C032W-QMLV
NATIONAL SEMICONDUCTOR
03 Dec 2008
DS90C032W-QML
DS90C032E-QML
NATIONAL SEMICONDUCTOR
01 Dec 2009
DS90C032WG-QML
DS90C032WGLQMLV
NATIONAL SEMICONDUCTOR
03 Dec 2008
DS90C032WG-QMLV
DS90C032WGLQMLV
NATIONAL SEMICONDUCTOR
03 Dec 2008

General Description

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90C032 accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN, shorted and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

Reliability Metrics

Part Number Process EFR Reject EFR Sample Size PPM LTA Rejects LTA Device Hours FITS MTTF (Hours)
DS90C032 MDRCS0800305350028105002797458048
DS90C032TMCS0800305350028105002797458048
DS90C032TMXCS0800305350028105002797458048
DS90C032W-QMLVCS0800305350028105002797458048
DS90C032WGLQMLVCS0800305350028105002797458048
DS90C032WLQMLVCS0800305350028105002797458048

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.


Application Notes

TitleSize in Kbytes Date Click link below to Download
AN-1110: Application Note 1110 LVDS Quad Dynamic I CC vs Frequency 159
Kbytes		 4-Oct-04 Download
AN-971: Application Note 971 An Overview of LVDS Technology 168
Kbytes		 5-Oct-98 Download
AN-971 (Japanese): Application Note 971 An Overview of LVDS Technology
 168 Kbytes   Download
AN-1040: Application Note 1040 LVDS Performance: Bit Error Rate (BER) Testing Test Report [num]2 43
Kbytes		 4-Oct-04 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

More Application Notes

TitleSize in Kbytes Date Click link below to Download
AN-1088: Application Note 1088 LVDS Signal Quality: Cable Drive Measurements using Eye Patterns Test Report #3 130
Kbytes		 4-Oct-04 Download
AN-977: Application Note 977 LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1 63
Kbytes		 5-Oct-98 Download
AN-977 (Japanese): Application Note 977 LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1
 104 Kbytes   Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 8-Nov-2009]