Features
| • | CPU Features
| | • | Fully static core, capable of operating at any rate from 0 to 24MHz (4 MHz minimum in active mode) |
| • | Multi-source vectored interrupts (internal, external, and on-chip peripheral) |
| • | On-chip power-on reset |
| • | On-Chip Memory
| | • | 48 kbytes of flash program memory or ROM memory (100K cycle) |
| • | 1.5 kbytes of ISP memory (100K cycle) |
| • | 2 kbytes of static RAM data memory |
| • | 640 bytes of non-volatile EEPROM data memory, word-programmable (100K cycle) |
| • | On-Chip Peripherals
| | • | Up to two Universal Synchronous/Asynchronous Receiver/Transmitter (USART) devices |
| • | Programmable Idle Timer and real-time clock (T0) |
| • | Up to two dual 16-bit multi-function timers (MFT1 and MFT2) |
| • | SPI/MICROWIRE-PLUS serial interface |
| • | 8-channel, 8-bit Analog-to-Digital (A/D) converter with external voltage reference, programmable sample-and-hold delay, and programmable conversion frequency |
| • | Up to two analog comparators |
| • | Integrated WATCHDOG logic |
| • | I/O Features
| | • | Up to 48 general-purpose I/O pins (shared with on-chip peripheral I/O pins) |
| • | Programmable I/O pin characteristics: TRI-STATE output, push-pull output, weak pull-up input, high-impedance input |
| • | Software-configurable Schmitt triggers on inputs |
| • | Power Supply
| | • | 4.5V to 5.5V single-supply operation |
| • | Temperature Range
| | • | 0°C to +70°C |
| • | -40°C to +85°C |
| • | -40°C to +125°C |
| • | Development Support
| | • | Real-time emulation and full program debug capabilities available |
| • | CompactRISC tools provide C programming and debugging support |
Description The family of CompactRISC™ microcontrollers are general-purpose 16-bit microcontrollers based on a Reduced Instruction Set Computer (RISC) architecture. The device operates as a complete microcomputer with all system timing, interrupt logic, flash program memory or ROM memory, RAM, EEPROM data memory, and I/O ports included on-chip. It is ideally suited to a wide range of embedded controller applications because of its high performance, on-chip integrated features and low power consumption, resulting in decreased system cost.
The family of CompactRISC 16-bit microcontrollers offer the high performance of a RISC architecture while retaining the advantages of a traditional Complex Instruction Set Computer (CISC): compact code, on-chip memory and I/O, and reduced cost. The CPU uses a three-stage instruction pipeline that allows execution of up to one instruction per clock cycle, or up to 20 million instructions per second (MIPS) at a clock rate of 24MHz.
In the following text, device is alsays refered to the family of CompactRISC 16-bit microcontrollers. For the exact feature set, check individual datasheets.
The device is available in a variety of package sizes and types. All devices have 48 kbytes of reprogrammable flash program memory, 1.5 kbytes of ISP memory, 2 kbytes of static RAM, and 640 bytes of non-volatile EEPROM data memory. The 80-pin device has two USARTs, two 16-bit multi-function timers, one SPI/MICROWIRE-PLUS™ serial interface, an 8-channel A/D converter, two analog comparators, WATCHDOG™ protection mechanism, and up to 48 general-purpose I/O pins. The 44-pin devices offer the same basic features as the 80-pin device, but with fewer I/O ports and peripheral modules due to the smaller number of available pins.
All devices operate with a high-frequency crystal as the main clock source. Some packages allow the device to operate with either the main clock source or with a slow (32.768 KHz) oscillator in Power Save mode. The device supports several Power Save modes which are combined with multi-source interrupt and wake-up capabilities.
Powerful cross-development tools are available from National Semiconductor and third party suppliers to support the development and debugging of application software for the device. These tools let you program the application software in C and are designed to take full advantage of the CompactRISC architecture.
Please check the web for the latest update to this datasheet.
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