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Description Note: COP8SA devices are instruction set and pinout compatible supersets of the COP800C Family devices, and are replacements for these in new designs when possible.
The COP820C/840C Family ROM based microcontrollers are integrated COP8 Base core devices with smaller memory (1k/2k), and fewer on-board features. These single-chip CMOS devices are suited for lower-functionality applications where system cost is of prime consideration. Pin and software compatible (different VCC range) 4k/32k OTP versions are available (COP87LxxCJ/RJ Family). Erasable windowed versions are available for use with a range of COP8 software and hardware development tools.
Family features include an 8-bit memory mapped architecture, 10 Hz CKI with 1µs instruction cycle, one multi-function 16-bit timer/counter with PWM, MICROWIRE/PLUS serial I/O, power saving HALT mode, three clock modes, high current outputs, software selectable I/O options, 2.3v-6.0v operation and 20/28 pin packages.
Devices included in this datasheet are:
| Device | Memory (bytes) | RAM (bytes) | I/O Pins | Packages | Temperature | Comments |
| COP620C | 1k ROM | 64 | 24 | 28 DIP/SOIC | -55 to +125°C | 4.5v - 5.5v |
| COP820C | 1k ROM | 64 | 24 | 28 DIP/SOIC | -40 to +85°C | |
| COP920C | 1k ROM | 64 | 24 | 28 DIP/SOIC | 0 to +70°C | 2.3v-4.0v, CH=4.0v-6.0v |
| COP622C | 1k ROM | 64 | 16 | 20 DIP/SOIC | -55 to +125°C | 4.5v - 5.5v |
| COP822C | 1k ROM | 64 | 16 | 20 DIP/SOIC | -40 to +85°C | |
| COP922C | 1k ROM | 64 | 16 | 20 DIP/SOIC | 0 to +70°C | 2.3v-4.0v, CH=4.0v-6.0v |
| COP640C | 2k ROM | 128 | 24 | 28 DIP/SOIC | -55 to +125°C | 4.5v - 5.5v |
| COP840C | 2k ROM | 128 | 24 | 28 DIP/SOIC | -40 to +85°C | |
| COP940C | 2k ROM | 128 | 24 | 28 DIP/SOIC | 0 to +70°C | 2.3v-4.0v, CH=4.0v-6.0v |
| COP642C | 2k ROM | 128 | 16 | 20 DIP/SOIC | -55 to +125°C | 4.5v - 5.5v |
| COP842C | 2k ROM | 128 | 16 | 20 DIP/SOIC | -40 to +85°C | |
| COP942C | 2k ROM | 128 | 16 | 20 DIP/SOIC | 0 to +70°C | 2.3v-4.0v, CH=4.0v-6.0v |
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