SDV/SDI

What is SPI or Serial to Parallel Interface?

The Serial Peripheral Interface Bus (SPI) is a synchronous serial data link standard that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave devices are allowed with individual slave select (chip select) lines. The Microwire and MicrowirePLUS buses are a subsets of SPI. National offers many solutions with SPI interface including:



What kind of coaxial cable can be used for Serial Digital Video and similar digital data transmission?

Serial Digital Video (SDV) applications normally use precision 75Ω coaxial cables. This cable is designed especially for video applications. Examples of this type of cable are Belden 8281 and 1694A. The construction of cable for SDV is critical to achieving both low error rates and long transmission distances. Coaxial cable for SDV must be of 100% copper construction for both the center conductor and the shield braid. A solid copper center conductor is preferred over stranded as it has a more predictable surface area and skin effect at high frequencies (HF). The shield should be double braid for the most consistent impedance and best shielding effectiveness. Some newer cables use a combination of foil and braid. An inner dielectric of foam polyethylene is preferred for best HF performance and maximum transmission distance. Foam dielectrics are more fragile than solid and require more careful handling and installation. Coax with solid polyethylene dielectric will have poorer HF performance and is generally limited to distances less than 1000 feet (300 meters).

Some types of 75Ω coaxial cable such as RG-6/U are intended for RF applications at frequencies greater than 50MHz. Such cables often are made with copper-clad, steel-cored center conductors and/or shield braid. Because of its NRZI encoding, the SDV signal contains frequency components down to DC. Steel-cored cables have high attenuation to the low-frequency and DC component of the SDV signal. This is because the DC resistance of the steel core is much greater than copper. The copper cladding on the steel core is very thin, a few hundreds of microns. Thus, it does not have any effect on conductivity until the signal frequency becomes high enough to where the skin-effect depth is less than or equal to the copper thickness. Cable equalizers cannot compensate for this excess attenuation and the low frequency losses caused by such cables. This leads to poor signal quality, data errors and reduced transmission distances.

The remarks about coaxial cable for SDV also apply to any other type of digital data transmission where coding is used that results in a significant DC or low frequency signal content. Examples of such coding are NRZ and NRZI.

Relevant Part: CLC001;CLC005;CLC006;CLC007;CLC012;CLC014;CLC020;CLC021;CLC030;CLC031A;LMH0031;LMH0030

When do I need a reclocker in an SDI application?

The primary purpose of the reclocker is to reduce jitter. The reclocker detects the data rate of the incoming signal and generates a clean clock at that frequency, then uses this clock to "reclock" the data, thus reducing jitter.

Reclockers are used after a digital data processing or switching system. It is desirable to reduce jitter as much as possible prior to re-transmission, so reclockers are usually located just upstream of the cable driver.

When receiving data over long cable lengths, sometimes a cable equalizer is all that is needed to properly restore the signal. But as the data rate or cable length increases, jitter will increase as well and it becomes necessary to add a reclocker to the system in order to properly clean up the signal. Reclockers are useful anytime jitter needs to be reduced in SDI applications.



Can I swap the positive and negative serial data inputs and outputs in SDI applications? Does it matter if I use the true input/output or its complement?

SMPTE 424M, SMPTE 292M, and SMPTE 259M applications use polarity-free NRZI encoding. Because the data is polarity insensitive, it does not matter if you use the true input/output or its complement.

However, when processing DVB-ASI or other polarity-sensitive data, it is necessary to use matching polarity inputs and outputs.



How far can I drive a signal with a particular SDI cable driver?
How much cable you can drive is determined by the equalizer at the receiving end, not by the cable driver. The purpose of the SDI cable driver is to set the proper amplitude and edge rates so the signal can be received and restored by an SDI adaptive cable equalizer after long lengths of cable. The equalizer datasheet specifies the type and length of cable it can equalize for particular data rates


Should I AC or DC couple between on-board SDI devices such as equalizers, reclockers, cable drivers, or crosspoint switches?

On-board signals between SDI devices should be DC coupled whenever possible. This has two positive effects:

  1. 1) It saves several components, thereby simplifying the circuit and reducing cost. The two coupling capacitors and any components required to re-bias the signal at the next input stage are no longer needed.
  2. 2) It helps to avoid AC coupling effects due to pathological signals. Pathological signals are stressing patterns inherent in SDI that contain long runs of ones or zeros. Long intervals at a constant signal level can introduce significant shifts in the AC-coupled signal, leading to errors. The AC-coupling capacitor must be large enough to compensate for this, and that requires large component pads which further degrades signal quality.


What are pathological signals? How can they affect SDI equalizer and reclocker performance?

Pathological signals are specific patterns of low transition density that stress SDI receivers. These signals are a side effect of the scrambler used in SDI systems. Pathological signals are discussed in SMPTE EG 34.

A pathological signal that stresses the cable equalizer consists of 19 bits of one polarity followed by 1 bit of the opposite polarity. This produces a signal with a large amount of low-frequency energy and either a very high or very low duty cycle which stresses the DC restoration in equalizers. The PLL section of the receiver is stressed by a pathological signal that consists of 20 bits of one polarity followed by 20 bits of the opposite polarity. This condition can cause a poorly-designed PLL to lock to the wrong frequency.

Once initiated, these stress patterns occur only until the end of the active video line. The horizontal blanking portion of the video line disrupts this pattern, but it may repeat over the active video portion of consecutive video lines.

The equalizer and PLL pathological signals are combined to form the SDI Checkfield (also known as the Matrix Pathological), with the top half of the frame being the equalizer pathological and the bottom half of the frame made up of the PLL pathological. SMPTE RP 178 and SMPTE RP 198 document the SDI Checkfield for SMPTE 259M and SMPTE 292M/424M, respectively.

National''s SDI equalizers and reclockers are specifically designed and tested to support these stressing patterns