Clock Generators, Jitter Cleaners, and Distribution

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LMK Precision Clock Generators, Jitter Cleaners, and Distribution

New LMK03806 Ultra-Low Jitter Clock Generator

The highly integrated clock generator features the industry's best jitter performance. Delivering 14 independently programmable ultra-low jitter outputs from a single low-cost crystal, crystal oscillator (XO), or external reference clock, the enables a dramatic reduction in component count up to 80% with PCB area and BOM cost reduction up to 50%.

Key Features

  • Generates multiple reference clocks from a low-cost crystal, XO, or reference clock
  • High-frequency VCO and programmable output dividers
  • Sub-50 fs RMS jitter at 312.5 MHz (1.875 – 20 MHz)
  • Highly integrated solution
    • Reduces board area
    • Lowers BOM cost by up to 50%
  • 14 programmable outputs
  • Programmable dividers to generate multiple clocks from a low-cost crystal, XO, or external reference clock
 LMK03806 Ultra-Low Jitter Clock Generator with 14 Independently Progrgammble Outputs
   

New LMK04800 Family

The family of clock jitter cleaners combines a high level of functional integration with ultra-low phase noise performance. The devices are highly flexible and configurable to support a variety of different clock architectures.

Key Performance Specifications

  • Ultra-low RMS jitter performance
    • 111 fs RMS jitter (12 kHz to 20 MHz) at 184.32 MHz
    • 123 fs RMS jitter (100 Hz to 20 MHz) at 184.32 MHz
  • Dual-loop PLLatinum™ PLL architecture
  • -162 dBc/Hz wideband noise floor
  • -227dBc/Hz PLL figure of merit
  • 1.536 GHz max output frequency
  • 25 ps step analog delay control
  • Videos: Technical Overview, Jitter Performance Demonstration
 LMK04800 Clock Jitter Cleaners with Cascaded PLLatinum PLL Architecture

LMK04800 Product Features

  • Hold-over mode supports recovery of clock when input clock is lost
  • Multiple clock inputs with automatic switching
  • 50% duty cycle output dividers, 1 to 1045 (even and odd)
  • 12 programmable outputs (LVPECL, LVDS, or LVCMOS)
  • Precision digital and analog delays
  • Zero-delay mode

LMK04800 Applications

  • Wireless and wired communications infrastructure
  • Test and measurement equipment
  • Military/industrial
  • Medical imaging
  • Clocks for ADCs, DACs, SerDes, and FPGAs
This unique combination of performance and functional integration reduces clock architecture complexity and provides design engineers with multiple options to tradeoff system performance, component count, and overall Bill of Materials (BOM) cost.

 

Overview of Clock Clock Generators, Cleaners, and Distribution Families

Family LMK04800 & LMK04000 LMK03000 LMK03806 LMK02000 LMK01000
Jitter Cleaning    
Distribution Yes
Jitter (typ) < 0.2 ps < 0.4 ps < 0.2 ps < 0.2 ps < 30 fs (additive)
VCO External crystal (or VCXO) Integrated VCO Integrated VCO External VCXO –
Outputs Up to 12 4 or 8 14 4 or 8 8 outputs, 2 inputs
Features
  • Cascaded PLLatinum® PLL architecture
  • Lower BOM cost using internal crystal oscillator circuit
  • Ultra-low RMS jitter performance
  • Three performance grades
  • Lower BOM cost and footprint using internal VCO
  • Integrated VCO with very low phase noise floor
  • Generates multiple clocks from a low-cost crystal, XO, or external clock
  • High-frequency VCO and programmable output dividers
  • Generates reference clocks for Ethernet PHYs, SerDes, SATA, Fibre Channel, SCSI, etc.
  • 20 fs additive jitter
  • Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz
  • Clock output frequency range of 1 to 800 MHz
  • Dedicated divider and delay blocks on each clock output
  • Up to 1600 MHz clock frequency
  • 30 fs additive jitter (100 Hz to 20 MHz)
  • Dual clock inputs
  • Programmable output channels (0 to 1600 MHz)
  • External synchronization


LMK04800 & LMK04000 Precision Clock Conditioners with Cascaded PLLs

Device 2VPECL / LVPECL Outputs LVDS Outputs LVCMOS Outputs VCO
3 – 4 1185 to 1296 MHz
3 – 4 1430 to 1570 MHz
3 – 4 1600 to 1750 MHz
5 – – 1185 to 1296 MHz
5 – – 1430 to 1570 MHz
2 2 2 1430 to 1570 MHz
2 2 2 1840 to 2160 MHz
LMK04803B 12 Programmable LVDS/LVPECL/LVCMOS + 2 OSCin Buffer Outputs 1840 to 2030 MHz
LMK04805B 2148 to 2370 MHz
LMK04806B 2370 to 2600 MHz
LMK04808B 2750 to 3072 MHz

 

LMK03806 Precision Clock Generator with 14 Programmable Outputs

Device Outputs VCO Tuning Range RMS Jitter (fs)
14 Independently Programmable 2.36 - 2.60 GHz 150

 

LMK03000 Precision Clock Conditioner with Integrated VCO

Device Outputs VCO
Tuning Range (MHz) RMS Jitter (fs)
3 LVDS, 5 LVPECL 1185 - 1296 400
/ 800
1200
1470 - 1570 400
800
1200
4 LVPECL 1566 - 1724 400
800
4 LVDS, 4 LVPECL 1843 - 2160 500
800

 

LMK02000 Precision Clock Distributor with Integrated PLL

Device LVPECL Outputs LVDS Outputs Fout (max)
5 3 1080 MHz
4 0 1080 MHz

 

LMK01000 1.6 GHz High Performance Clock Buffer, Divider, and Distributor

Device LVDS Outputs LVPECL Outputs
3 5
8 –
– 8

 

LMK00301 3.1 GHz High Performance Clock Buffer & Universal Level Translator

Device LVDS, LVPECL, HSCL Outputs Additive Jitter Crystal Interface
10 51 fs 10 - 40 MHz

 

More Parametric Tables

Clock Generators with Cleaning and Distribution

Clock Distribution Only

Phase-Locked Loops

Related Sites

  

Design

Evaluation Boards

Software

National Clock Design Tool NEW!
 National Clock Design Tool software is used to aid part selection, loop filter design, and simulation of timing device solutions. Enter desired output frequencies and optionally a reference frequency to find which National devices meet the specified requirements along with divider values and a recommended loop filter to minimize jitter.

CodeLoader 4.1 for Clock Conditioners
National's CodeLoader 4 software is used to program the Clock Conditioners through either the USB or LPT port of a computer. Aside from this function, it is also provides information on how to program the part by showing the bits that are actually sent.

Application Information

IBIS Models

NSID IBIS Ver File Rev Date

LMK01000

 3.2 1.0 4/06/09

LMK01010

 3.2 1.0 4/07/09

LMK01020

 3.2 1.0 4/08/09

LMK03000

 3.2 1.0 3/27/08
LMK03001 3.2 1.0 3/27/08

See all clock & timing models & software

  

Explore

Clock Conditioner Owner's Manual
The purpose of this manual is to help the clock system designer understand the impact of noise on clock performance and understand the trade-offs that can be made for a given application.

Target Clock & Timing Applications

  • Data converter clocking
  • SONET/SDH
  • Networking
  • Wireless infrastructure multi-carrier, multi-standard base stations
    • GSM/EDGE / UMTS / WCDMA, TD-SCDMA, CDMA, LTE and WiMAX
  • Medical
  • Test and measurement
  • Military and Aerospace

 

See Timing Homepage app notes, boards, and software tabs for more resources

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