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Communications Infrastructure Solutions GuideSee the newest, most robust products for both wired and wireless infrastructure applications.
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Reference Designs
Find the latest reference designs targeted specifically at wired and wireless subsystems.
Application Note (1926)
Discover the benefits of
M-LVDS and clock and data distribution applications.
Online Seminars
View online seminars that address the challenges and provide solutions to the wired and wireless communication infrastructure market. .
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National Semiconductor's communications infrastructure solutions and subsystems are designed to meet the needs of wired data centers, wireless base stations and merchant power applications. These high performance signal path, power management and interface solutions maximize system efficiency, increase power density and deliver outstanding system performance. One of National Semiconductor’s most innovative system-level energy management breakthroughs is PowerWise Adaptive Voltage Scaling (AVS) technology. Part of the PowerWise set of solutions, the AVS architecture is a closed-loop voltage optimization technology for reducing active and standby energy consumption of digital processors, ASICs, and Systems on Chip. National's easy-to-use online design tools and reference designs further simplify the design process making it easier and faster to get your designs to market. Find out more today.
Closed loop optimization technology reduces active and standby energy consumption of digital processors, ASICs, and SoCs by as much as 60%. Watch the video and learn more.
LM25088 / LM5088
Emulated current mode buck controllers with frequency dithering provides high performance and low EMI over a wide input voltage range. Download the podcast to learn more about the LM5088 controller.
LM20xxx
High-power density synchronous switchers capable of driving up to 6A of output current for point-of-load (PoL) applications. Read the application note to learn more about powering FPGAs using LM201xx switchers. Read the application note to learn more about powering FPGAs using LM201xx switchers.
ADC16V130
16-bit, 130 Mega-Samples Per Second (MSPS) A/D converter delivers excellent linearity performance and lowest power to enable a new class of multi-carrier GSM and multi-carrier, multi-standard wireless base station receivers. Download the reference design to learn more about low intermediate frequency receivers.
ADC10D1000
10-bit, 2 Giga-Sample Per Second Single/1 GSPS Dual A/D Converter provides the industry’s highest spurious-free dynamic range (SFDR) performance of 66 decibels relative to carrier (dBc) and 9.1 effective number of bits (ENOB).
LMK04000
Clock jitter cleaners provide ultra low-noise clocks without external high-performance Voltage-Controlled Crystal Oscillator (VCXO) modules. Download the reference design to learn more about low intermediate frequency receivers and watch the online seminar to learn more about clock jitters.
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