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LOW VOLTAGE DIFFERENTIAL SIGNALING (LVDS)
LVDS & CML (Buffers and SerDes)

LVDS Owner's Manual - 4th Edition

Completely updated for 2008!
Includes CML, signal conditioning/equalization, jitter/crosstalk, and high-speed transmission line topics

Contents

  • Signaling technology overview (LVDS, CML, LVPECL, etc.)
  • Network topologies (point-to-point, multidrop, multipoint)
  • SerDes architectures (parallel clock, embedded clock (start-stop) bits, 8b/10b)
  • Transmission line termination and level translation
  • Transmission line design and layout guidelines
  • Overview of jitter and crosstalk (RJ, DJ, duty cycle distortion, ISI, NEXT/FEXT crosstalk, BER, eye patterns)
  • Interconnect media and signal conditioning (cables, backplanes, pre-/de-emphasis, equalizers)
  • Software I/O models (IBIS, SPICE, s-parameters)
  • Interface WEBENCH online simulation tool
  • Clock distribution and clock conditioners
  • Cable extension (generic, DVI/HDMI, etc.)
  • Glossary, acronyms, and other resources

Download now! (pdf 4.22MB)

 

LVDS Owners Manual 4th Edition 2008


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