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Clock Jitter Cleaners

LMK Precision Clock Conditioners

World's Lowest Jitter Single-Chip Precision Clock Conditioner
(product brief pdf 391KB)

Overview
National's next generation LMK04000 Family of Precision Clock Conditioners improves system performance and accuracy. Using a new cascaded PLLatinum® architecture combined with an external crystal and varactor diode, the LMK04000 family provides sub-200 femtosecond (fs) Root Means Square (RMS) jitter (see phase noise characterization app note). The LMK04000 family is ideal for clocking analog-to-digital converters (ADC), Digital-to-Analog Converters (DAC) and other high-performance components used in wireless infrastructure, test and measurement, and medical ultrasound and imaging equipment.

The cascaded architecture consists of two high-performance PLLs, a low-noise crystal oscillator circuit, and a high-performance Voltage Controlled Oscillator (VCO). The first PLL (PLL1) provides a low-noise jitter cleaner function while the second PLL (PLL2) performs the clock generation.

The output from PLL2 is then divided and distributed to 5 differential outputs pairs. Each output pair consists of a programmable divider, a phase synchronization circuit, a programmable delay and either a Low-Voltage Differential Signaling (LVDS), Low-Voltage Positive-Emitter-Coupled Logic (LVPECL) or Low-Voltage CMOS (LVCMOS) output driver. The LVPECL and LVDS outputs support clock rates up to 1080 MHz, while the LVCMOS outputs reach up to 250 MHz.

The LMK04000 family features dual redundant inputs and an optional default-clock upon power up. The input block is equipped with loss of signal detection and automatic or manual selection of the reference clock. The default-clock is available on CLKout2 and it can be used to provide an initial clock for the field-programmable
gate array (FPGA) or the microcontroller that programs the clock jitter cleaner during the system power-up sequence.

 

Overview of Families

Family LMK04000 LMK03000 LMK02000 LMK01000
Jitter Cleaning  
Distribution
Jitter (typ) < 0.2 ps < 0.4 ps < 0.2 ps < 30 ps (additive)
VCO External crystal (or VCXO) Integrated VCO External VCXO –
Outputs 5 to 7 4 or 8 4 or 8 8 outputs, 2 inputs
Features
  • Cascaded PLLatinum® PLL architecture
  • Lower BOM cost using internal crystal oscillator circuit
  • Ultra-low RMS jitter performance
  • Three performance grades
  • Lower BOM cost and footprint using internal VCO
  • Integrated VCO with very low phase noise floor
  • 20 fs additive jitter
  • Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz
  • Clock output frequency range of 1 to 800 MHz
  • Dedicated divider and delay blocks on each clock output
  • Up to 1600 MHz clock frequency
  • 30 fs additive jitter (100 Hz to 20 MHz)
  • Dual clock inputs
  • Programmable output channels (0 to 1600 MHz)
  • External synchronization


LMK04000 Precision Clock Conditioners with Cascaded PLLs 

 Device  2VPECL / LVPECL Outputs  LVDS Outputs  LVCMOS Outputs  VCO  
LMK04000B 3 – 4 1185 to 1296 MHz
LMK04001B 3 – 4 1430 to 1570 MHz
LMK04002B 3 – 4 1600 to 1750 MHz
LMK04010B 5 – – 1185 to 1296 MHz
LMK04011B 5 – – 1430 to 1570 MHz
LMK04031B 2 2 2 1430 to 1570 MHz
LMK04033B 2 2 2 1840 to 2160 MHz

 

LMK03000 Precision Clock Conditioner with Integrated VCO 

Device  Outputs  VCO
Tuning Range (MHz) RMS Jitter (fs)
LMK03000C 3 LVDS, 5 LVPECL 1185 - 1296 400
LMK03000 / LMK03200 800
LMK03000D 1200
LMK03001C 1470 - 1570 400
LMK03001 800
LMK03001D 1200
LMK03002C 4 LVPECL 1566 - 1724 400
LMK03002 800
LMK03033C 4 LVDS, 4 LVPECL 1843 - 2160 500
LMK03033 800

 

LMK02000 Precision Clock Distributor with Integrated PLL 

Device LVPECL Outputs LVDS Outputs Fout (max)
LMK02000 5 3 1080 MHz
LMK02002 4 0 1080 MHz

 

LMK01000 1.6 GHz High Performance Clock Buffer, Divider, and Distributor 

Device  LVDS Outputs  LVPECL Outputs 
LMK01000 3 5
LMK01010 8 –
LMK01020 – 8

 

More Parametric Tables

Clock Jitter Cleaners

Clock Distributors

Phase-Locked Loops

Related Sites

  

Design

Evaluation Boards

Software

National Clock Design Tool NEW!
 National Clock Design Tool software is used to aid part selection, loop filter design, and simulation of timing device solutions. Enter desired output frequencies and optionally a reference frequency to find which National devices meet the specified requirements along with divider values and a recommended loop filter to minimize jitter.

CodeLoader 4.1 for Clock Conditioners
National's CodeLoader 4 software is used to program the Clock Conditioners through either the USB or LPT port of a computer. Aside from this function, it is also provides information on how to program the part by showing the bits that are actually sent.

Application Information

IBIS Models

NSID IBIS Ver File Rev Date

LMK01000

 3.2 1.0 4/06/09

LMK01010

 3.2 1.0 4/07/09

LMK01020

 3.2 1.0 4/08/09

LMK03000

 3.2 1.0 3/27/08
LMK03001 3.2 1.0 3/27/08
 

Explore

Clock Conditioner Owner's Manual
The purpose of this manual is to help the clock system designer understand the impact of noise on clock performance and understand the trade-offs that can be made for a given application.

Target Clock & Timing Applications

  • Data converter clocking
  • SONET/SDH
  • Networking
  • Wireless infrastructure multi-carrier, multi-standard base stations
    • GSM/EDGE / UMTS / WCDMA, TD-SCDMA, CDMA, LTE and WiMAX
  • Medical
  • Test and measurement
  • Military and Aerospace

 
WHAT'S NEW
Clock & Timing Products
  • Industry's Highest Performance Frequency Synthesizer System with Integrated VCO
  • LMK04000 Family - Clock Jitter Cleaners with Cascaded PLLatinum PLLs
  • LMK01000 Family - < 30 fs High Performance Clock Buffer, Divider, and Distributor for Clocks up to 1.6 GHz
  • LMK03000 Family - Clock Jitter Cleaners with Integrated VCO
  • LMK02000 Family - Clock Jitter Cleaners for use with external VCXO

 

Clock & Timing App Notes
  • AN-1939 - Crystal Based Oscillator Design with the LMK04000 Family
  • AN-1910 - LMK04000 Family Phase Noise Characterization
  • AN-1864 - Phase Synchronization with Multiple Devices and Frequencies
  • AN-1821 - CPRI Repeater System
  • AN-1734 - Using the LMK03000C to Clean Recovered Clocks

 

Clock & Timing Evaluation Boards
  • LMK04031BEVAL - LMK04000 Family Precision Clock Conditioner with Integrated VCO
  • LMK04033BEVAL - Precision Clock Conditioner with Dual PLLs VCO Range (1840 to 2160 MHz), 6 Outputs
  • LMK01000EVAL - 1.6 GHz High Performance Clock Buffer, Divider, and Distributor
  • LMK02000EVAL-1 - LMK02000 Evaluation board with 245.76 VCXO
  • LMK02000EVAL-2 - LMK02000 Evaluation board without VCXO
  • LMK03001CEVAL - Precision Clock Conditioner with Integrated VCO (1470 - 1570 MHz)
  • USB2UWIRE-IFACE - USB ↔ uWire Interface Board establishes a USB connection from CodeLoader 4 software to LMX and LMK evaluation boards

All Clock/Timing/Wireless eval boards.

 

Clock & Timing Models & Software

IBIS Models

LMK Clock Design Tool

National Clock Design Tool software is used to aid part selection, loop filter design, and simulation of LMK clock conditioner timing device solutions. Enter desired output frequencies and optionally a reference frequency to find which National devices meet the specified requirements along with divider values and a recommended loop filter to minimize jitter.

CodeLoader 4.2 for LMK and LMX Devices
National's CodeLoader 4 software is used to program LMK and LMX products through either the USB or LPT port of a computer. Aside from this function, it is also provides information on how to program the part by showing the bits that are actually sent.

EasyPLL for LMX PLL/VCO Products

 

 



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