Metrics: Reliability

Available Reports

PPM/FITS Summary: A graphical trend of National Semiconductor's Reliability Performance.

PPM/FITS - By Process: Failure Rates of Major Processes at National Semiconductor.

Package Data: Failure Rates of all Packages at National Semiconductor.

In reviewing this data, it may be helpful to refer to our Process by NSID Cross Reference Table (pdf: 1.8MB) and information on our Reliability Testing Programs.

Purpose of this Metric

• To provide a periodic monitor of product reliability under accelerated test conditions on wafer fabrication and assembly processes.
• To provide fab process and package reliability performance characteristics to customer.

Audit Strategy

• Package/Assembly processes are audited by Autoclave (ACLV), Temperature and Humidity Bias Test (THBT) and Temperature Cycling (TMCL) tests.
• Wafer fabrication processes are monitored by EFR and Long Term High Temperature Operating Life (OPL) tests.
• Devices are selected within each package and process audit groups based on representability and high manufacturing volume. Each audit group contains at least 3 devices.

Test Frequency

PPM/FITS Summary 

National Semiconductor conducts a Long Term Audit (LTA) program in order to identify trends in reliability of our products. The chart below displays the Early Failure Rate (PPM) and Long Term Life Failure Rate (FITS) trends for these products.

The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

The trend lines for both PPM and FIT rates illustrate the positive year to year reliability improvements at National Semiconductor.

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PPM/FITS by Process 

The following table lists Early Failure Rates in parts per million (PPM ) and Long Term Failure Rates in units per billion device hours (FITS) for the wafer fabrication processes.

The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

The data used to calculate the failure rates was obtained from OPL tests performed in the Reliability Monitoring Program; and from Reliability Qualification where applicable

These failure rates are updated quarterly with data through the end of the preceding quarter.

Period Covered: 29th Feb 2004 to 31st May 2009

Last Updated: 15th October 2009

Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
.35	0	19690	0	0	1425000	3	404347640
.5	0	14235	0	0	977500	4	277368294
ABCD150	0	34175	0	0	4234000	1	1201409060
ABCD150XV1	0	3868	0	0	2595000	2	736338335
ABCD150XV2	0	3601	0	0	1155496	4	327875145
ABCD5	0	5364	0	0	1626984	3	461661152
ABIC	0	16313	0	0	2828000	2	802452721
BICMOS8	2	14113	142	0	1677500	3	475995205
BICMOS8B+	0	1152	0	0	743900	5	211083656
BIFET	0	12875	0	0	1065000	4	302196657
CBIC	0	9225	0	0	1515000	3	429885386
CMOS	0	19715	0	0	2605000	2	739175862
CMOS7	0	18406	0	0	1089000	4	309006723
CMOS8	1	13140	55	0	1615500	3	458102536
CMOS8T	0	16710	0	0	1780000	2	505079860
CMOS9	1	7327	137	0	1103000	4	312979261
CMOS9T	0	2160	0	0	2397152	2	680198425
CS065	2	38968	52	0	4402000	1	1249079519
CS080	0	30535	0	0	2810500	2	797458048
CS100	1	14211	71	0	898000	4	254809951
CS150	1	15120	67	0	1067500	4	302906039
CS200*	0	9850	0	0	3375000	2	957665465
DLM	0	9890	0	0	1810000	2	513592442
HV700	0	13850	0	0	1492500	3	423500950
LB250	0	19780	0	0	2605000	2	520686260
LB300	0	33664	0	0	3830500	1	1086914834
LFAST1	0	19510	0	0	2605000	2	739175862
LMDMOS	0	17710	0	0	2470000	2	700869244
LS JI SLM*	0	800	0	0	100000	36	28375273
P2CMOS	0	49735	0	1	4330000	2	556689228
PVIP050	0	9960	0	0	855000	5	242608584
RFCMOS	0	2055	0	0	370000	10	104988510
SLM	0	44046	0	0	3532500	1	1002356520
TS060D	0	9940	0	0	725000	5	205720729
TS100	0	8370	0	0	900000	4	255377457
VIP 10	0	12801	0	0	1155000	4	327734403
VIP III	0	15575	0	0	1212500	3	344050185
VIP III H/HU2	0	2366	0	0	702554	6	199351615
VIP1+	0	24100	0	0	2785000	2	790251354
VIP50CLZ3	0	1755	0	0	315000	12	89382110

Note: PPM is a point estimate based on rejects and sample size for EFR.
* - Data from previous time range 02/24/2003 - 02/27/2004

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Package Data - Reliability Monitor Plan 

The following tables list failure rate in percentage (PCT) for packages. The data used to calculate the failure percentage was obtained from ACLV, THBT and TMCL tests.

These tables are updated quarterly with data through the end of the preceding quarter.

Percentage = Rejects/Sample size * 100
Period Covered: 29th Feb 2004 to 31st May 2009
Last Updated: 15 October 2009

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