LVDS Articles and Whitepapers Home->Interface Solutions

LVDS Articles and Whitepapers


Type Technology LVDS Article Title/Synopsis
Article:
Signal Path Designer # 119
CML

Driving High-Speed Signals in Data Center Servers and Storage Area Networks
With less capital available for continuous system “upgrades”, new data center solutions must be space- and energy-efficient while supporting multi-faceted expansion to keep ahead of users’ data storage needs. Engineers are leveraging open industry standards like PCI Express (PCIe) and SAS/SATA to create efficient architectures that address current and future data center requirements. With only limited input and output signal conditioning written directly into these standards, hardware design has been constrained by cable and PCB attenuation of high-speed serial data. Even within a single rack of equipment, signals that remain on backplanes will exhibit losses beyond those detailed in the PCIe standard.

Article: EN-Genius connectivityZONE LVDS/CML/LVPECL An Overview of High-Speed Communications Over Twisted-Pair Cables
We have been installing and using twisted-pair cable since the late nineteenth century. Now, in the twenty-first century, it is still the most widely used cable type for high-speed data communications. Despite finding twisted-pair cable pretty much everywhere you look, if you search for articles that provide an in-depth analysis of the properties of these cables, you find very little. This article is intended to provide designers with an overview of high-speed communications over twisted-pair cable and identify the issues in getting high-speed data from point A to point B.
Article:
Industrial Control Design Line
LVDS/CML Getting the Most Out of Your Twisted Pairs - The Whys of Wires
Moving vast amounts of data between two points quickly, reliably and economically is what many designers are facing regularly when building their systems. When it comes to using copper cables as a transmission media in these data transport systems, twisted pair cables present many advantages, one of them being low cost. The low cost incentive these cables offer is very appealing, thus many designers are finding ways to employ them outside of their traditional application domain - Ethernet. Let's review relative performance bounds of twisted pair cables, explore signal conditioning solutions (i.e. pre/de-emphasis, equalization) semiconductor manufacturers offer to push these bounds out, sort out pros and cons of each solution and understand when you need to consider enhanced but more expensive cables.
Analog Edge LVDS Overcoming Impedance Discontinuities in High-Speed Signal Paths by Using LVDS
At data rates from 400 Mbps to 1.5 Gbps, data signal paths become transmission lines. At these speeds the signal path model must include the reactive parasitic components in the cable or backplane. It is not just the data rate itself - the fast edge rates contain even higher frequency energy that react worse in distributed impedance environments. Ignoring parasitic impedances and impedance discontinuities above 200 Mbps will cause added noise in the transmission line, and data bit errors will occur.
Analog Edge LVDS Hundreds of Megabits at Hundreds of Meters - Extending the Transmission Length of LVDS
Low-Voltage Differential Signaling (LVDS) is becoming the preferred differential interface standard as it delivers high data rates while consuming significantly less power than competing technologies. LVDS technology allows products to address applications with data rates of hundreds of Mbps in many market segments wherever the need for robust transmission of signals at high speed and low power exists.
DesignCon 2004 LVDS SerDes Architectures and Applications  (PDF 621KB)
This paper explores four distinct types of SerDes architectures: parallel clock SerDes, 8b/10s SerDes, embedded clock bits (alias start-stop bit) SerDes, and bit interleaving SerDes.  As each SerDes architecture is explained and compared, this paper will show how each fits an important range of today's applications.
Analog Edge LVDS Eye Opening Enhancements Extend the Reach of High-Speed Interfaces
Typically the faster you go, the shorter you go. Data rate is inversely proportional to cable length.  However new techniques offered in the latest generation of interface parts provide eye opening enhancements to extend the reach of the interconnect. Prior generations of interface devices focused mainly on level translation only. The current generation of devices uses new techniques of signal conditioning to optimize the signal quality at the receive end. This includes pre-emphasis, encoding, equalization, and termination optimization.
Analog Edge LVDS The Many Flavors of LVDS
The LVDS standard for Low Voltage Differential Signaling is becoming the most popular differential data transmission standard in the industry. This is driven by two simple features of the bus, Gigabits @ milliwatts! It delivers the speed without consuming the power. In addition, it brings along a whole set of other benefits that include low voltage power supply compatibility, low noise generation, high noise rejection, robust transmission signals, and it allows for integration.
DesignCon 2001 BLVDS Gigabit Backplane Design, Simulation and Measurement - The Unabridged Story (PDF 7.78MB)
This paper provides tips and practical guidelines for Gigabit backplanes.  Design, measurement and simulation topics are addressed.
DesignCon 2000 BLVDS A Baker's Dozen of High-Speed Differential Backplane Design Tips (PDF 1.68MB)
This paper provides tips and practical design guidelines for Bus LVDS backplanes.  Concepts are supported with design calculations, simulations, and actual hardware measurements.
DesignCon 2000 BLVDS Bus LVDS Expands Applications for Low Voltage Differential Signaling (LVDS)  (PDF 1.65MB)
This paper covers an introduction to LVDS with examples of real world applications to demonstrate the key points...then describes the advantages that BLVDS brings to a wider range of applications.
DesignCon 1999 BLVDS Signal Integrity and Validation of Bus LVDS (BLVDS) Technology in Heavily Loaded Backplanes  (PDF 444KB)
This paper presents the results of the BLVDS design and performance analysis and provides system backplane interconnect designers manufacturable design guidelines.  The guidelines are given in terms of suggested stub lengths, PCB impedances, termination resistor values and other design parameters.