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A die product is the unpackaged silicon die utilized in lieu of the package product version. The most frequently mentioned reasons for die product design-ins are to achieve improved miniaturization, better device performance and a higher level of functional integration. Each of these reasons create added value in the end product application utilizing die product. These applications include those with single die such as watches, calculators and smart cards as well as leading edge multiple die applications like cellular handsets and digital cameras. Better device performance utilizing die show up in processor modules for computers, workstations and servers as well as switcher/routers and telecommunications infrastructure. Functional integration of die products most commonly shows up where conflicting device processes such as analog, high frequency or clock rate combine with complex digital and/or memory to create innovative product capabilities.
Regardless of design motivation, whether manufacturing, product compatibility, time to market or cost savings, die products provide the fundamental value and justification for use. Consumers buy electronics products today so they can be more productive and increase the quality of their lives. The mantra of the electronics industry resounds with "smaller, lighter, faster, smarter" at continuously decreasing cost with reliability matched to application life expectancy. This makes portability and functionality the first measure of convenience and value. Die products provide the ultimate opportunity for size and weight reduction, speed and functionality increases in portable applications.
With complex silicon and "system on chip" design cycles averaging 14 to 18 months or more and coupled with the needed 6 to 9 month design cycle for consumer products, die is a design avenue to bridge the gap. Die utilization accelerates the time-to-market while taking advantage of chip performance enhancements.
The higher available margins resulting from early time to market is frequently increased even further through the cost savings resulting from PWB simplification. Using die product modules to displace high density interconnection demands on the whole PWB further benefits the design and cost.
National Semiconductor offers their die products with standard bond pads for wirebond implementation in Chip-on-Board (COB) applications.
These products have a peripheral bond pad configuration which provides easy access for wire bonding of the die to the substrate. This is the preferred configuration for Chip-on-Board assemblies. The bond pad pitch can vary from die to die in the peripheral configuration. The pitch on the die is determined based on optimum die area required for the function and the number of I/O pads needed to access the functions external connections.
Interconnect methods for wirebonding include gold-ball bonding and aluminum wedge bonding. Gold-ball bonding is a high throughput, high strength technology that allows for bonding of fine pitch bond pads. It does require an elevated temperature to bond and the gold wire results in higher material costs than aluminum wedge. Process consideration must be given to the set up conditions, wire diameter, wire length, metallurgy and surface conditions. Aluminum wedge bonding can be processed at room temperature and utilizes lower cost wire. Lower bond strength and lower throughput should be expected. Additional process consideration should be given to wire bond angles and forward/reverse bonding effects.
Footprint Comparison of Assembly Options
SMD Package
Chip-on-Board
Flip Chip
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