Interface Solutions for Altera FPGAs and CPLDs

Triple-Rate SDI and Video Clocking Daughter Card for the Altera Cyclone 3 Development Kit

National Semiconductor in collaboration with Altera has developed a triple-rate SDI and video clocking daughter card for the Altera Cyclone 3 development kit. The combined solution provides broadcast video system designers a comprehensive platform for rapid evaluation and prototyping of new designs to reduce time to market. This integrated platform includes hardware boards, FPGA firmware and management software

National’s daughter card, SDALTEVK, includes synthesizable FPGA source code available in both Verilog and VHDL to maximize flexibility and facilitate IP customization. The daughter card, available as an option, plugs directly into the Altera Cyclone 3 development board via Altera’s high-speed mezzanine connector (HSMC).

Interface Solutions for Altera FPGAs

Altera FPGAs				National high-speed interface solutions with Altera FPGAs
Family	True LVDS	Integrated SerDes channels		National’s interface devices	LVDS data rate	Key benefit(s)
Stratix™ EP1S10-EP1S80	840 Mbps	Yes		Equalizer DS32EV400 Quad 3.125 Gbps Equalizer	3.125 Gbps	Upgrade to Stratix-GX level performance
Stratix-II EP2S15-EPS180	1 Gbps	Yes
Cyclone™ EP1C3,4,6,12,20	-	No		SerDes with embedded clock 10-bit LVDS SerDes (SCAN921025/1226) 16/18-bit LVDS SerDes (DS92LV16/18)	800 Mbps- 2.5 Gbps	Enable high-speed SerDes capability Upgrade Cyclone from 640 Mbps to 1.25 Gbps Reduce simultaneous switching noise, improved signal integrity, flexible board layout
Cyclone-II EP2C5,8,20,35,50,70	805 Mbps	No
Max® II EPM240,570,1270,2210	Not supported	No		SerDes with embedded clock 10 Bit LVDS SerDes (SCAN921025/1226) 16/18 Bit LVDS SerDes (DS92LV16/18) LVDS Driver/receivers DS90LV011A/18A, DS90LV027/28A/49 DS90LV031A/32A, DS90LV47A/48A	800 Mbps- 2.5 Gbps 400 Mbps
				Benefits applicable to all Altera FPGAs
				LVDS crosspoint switches DS90CP22, SCAN90CP02	800 Mbps- 2.5 Gbps	Boost and copy LVDS signals
				LVDS channel link (parallel clock) SerDes 21,28,48 bit DS90CR21x,28x,48x	1.3-6.4 Gbps	Serialize wide busses – lower cost
				LVDS buffers and clock drivers DS90LV001 DS90LV110AT SCANSTA111/112	800 Mbps 800 Mbps NA	Reduces electrical stubs Save FPGA I/O resources Program multiple JTAG SCAN chains
				Bus LVDS products	200 Mbps	Enable multipoint-multidrop apps

Visit these Interface product folders or download their product briefs for more information.

• DP83848C/I/YB PHYTER®10/100 Single Port Physical Layer Products in Commercial/Industrial/Extended Temperature Ranges (product brief)
• DS40MB200 – 1 to 4 Gbps Dual Signal Conditioning (product brief)
• DS90LV004 Four-Channel LVDS Buffer/Repeater (product brief)
• DS92LV16/18 Bus LVDS serializer/deserializer (product brief)
• SCAN90CP02-1.5 Gbps LVDS 2x2 Crosspoint (product brief)
• SCANSTA112 – Multidrop JTAG multiplexer (product brief)

Analog Design Guide for Altera FPGAs and CPLDs
National understands the analog requirements of Altera's FPGAs and CPLDs and is able to provide designers with best-in-class tools and state of- the-art integrated circuits. In this design guide, National's power management, high speed interface, JTAG, ADC and amplifiers for Altera's FPGAs & CPLDs are briefly introduced.