Objective: Understand how to design with FPD link and LVDS Display Interface (LDI).
Length: 60 minutes
Published Date: Jul 30, 04
Step(s) to complete
- Complete the suggested assignments
- Complete the online test to receive a certificate from Bob Pease
About the Instructor: Albert Lee is a Senior Applications Manager for the Display Division's Flat Panel Display product line at National Semiconductor Corp. in Santa Clara, California. With over 10 plus years of related experience in the applications and design of Flat Panel display products, Albert Lee is contributing to Nationals emerging leadership in this rapidly expanding market segment. Before joining National in 1999, he received a BSEE from Northeastern University, Boston, Massachusetts in 1987.
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Reading Assignment:
- Learn common design practices that will allow you to design an error free, low emission FPD interface in AN-1085, "FPD-Link PCB and Interconnect Design-In Guidelines."
- Flat Panel Display link devices can also be used in parallel to increase bandwidth. Learn how this can be done in AN-1084, "Parallel Application of High Speed Link."
- In order to interface LDI and FPD-Link devices, special data mapping procedures must be used. Find out more about this in AN-1127, "LVDS Display Interface (LDI) TFT Data Mapping for Interoperability with FPD-Link."
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Research Assignment:
Using AN-1127, answer the following questions:
For a single pixel per clock input application:
- What 24-bit transmitter data pin is the R6 signal from a 24-bit VGA mapped to?
- Which 48-bit LDI transmitter data pin would it be mapped to?
- Which 28-bit receiver data pin would this be mapped to?
For a dual pixel per clock input application:
- What 24-bit transmitter data pin is the G05 signal from a 48-bit VGA mapped to?
- What 18-bit transmitter data pin would it be mapped to?
- What 48-bit receiver pin would it be mapped to?
CHECK ALL ANSWERS HERE
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