PowerWise® Design University

Boundary SCAN Enables System Level Programming, Configuration, and Mixed-Signal Test


Overview: The IEEE 1149.1 Standard for Boundary Scan Test (JTAG) is now a mainstream low-cost methodology to test printed circuit boards for interconnect faults. Ball Grid Array's (BGA) and other fine pitch packaging are the primary drivers for this trend, forcing design and test teams to consider manufacturing test early in the design cycle in order to maintain a high level of fault coverage. The limited test access without JTAG reduces the ability to isolate faults, pushes up the cost of In-Circuit-Test (ICT), and worse - increases the risk of test escapes.

This 5-wire test bus has found new uses beyond test - it is also the standard bus for In-System-Programming (ISP) and Configuration (ISC) by most of the major CPLD vendors. Flash programming and Emulation are additional capabilities of this test bus. These new functions make it desirable to have multiple SCAN chains on a single board, which will require management. Additionally, innovative approaches for testing mixed-signal nodes are now being investigated to further utilize the test infrastructure. Extending the test bus off the board to the backplane allows a system level approach to test and ISP/ISC during design debug, manufacturing, and for maintenance or upgrades after the equipment is sold and installed.

This seminar will explore these topics and present the benefits of a system-level embedded test infrastructure for new system designs. Throughout the seminar we will also show National's support products and their features.

Length: 60 minutes

Published Date: September 2002

Topics covered in this online seminar include:

  • Basic IEEE 1149.1 Overview
  • Multiple IEEE 1149.1 SCAN chain management
  • Extending the Test Bus from Board Test to System-Level Test
  • Mixed-Signal Test: High Speed LVDS with BIST
  • Mixed-Signal Test: IEEE 1149.4 - the Analog Test Standard

Presenter: Brian Stearns is a Staff Marketing Engineer at National Semiconductor. He holds a BSET degree from Rochester Institute of Technology in New York. Employed by National for 19 years, Brian has held various roles in Marketing and Product Engineering for several digital and mixed signal product lines. His focus today is to educate customers on the benefits of adopting DfT and National's support of embedded test features in new products.

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